Guard Trace Layout for On-Chip Inductor Coupling Noise
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Solution Overview
Problem
On-chip inductors in semiconductor devices are susceptible to coupling noise from other circuits, and moving aggressor devices away to reduce interference increases chip size and cost.
Innovation Solution
Implementing a guard trace connected to a ground layer with a twisted structure or differential circuit design that changes the phase or direction of current signals, thereby reducing coupling noise without increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the aggressor device is moved away from the on-chip inductor to reduce coupling noise, then the coupling noise is suppressed, but the chip area increases
Solution Approach 1:
A guard trace is introduced as an intermediary element positioned between the aggressor device and the on-chip inductor. This guard trace acts as a mediator that intercepts and redirects electromagnetic interference, protecting the inductor from coupling noise without requiring increased separation distance between the aggressor and inductor, thus maintaining compact chip area.
Solution Approach 2:
The harmful electromagnetic coupling is extracted and redirected through the guard trace structure. By introducing the guard trace with specific grounding connections, the interference path is separated and controlled, allowing the aggressor device to remain close to the inductor while the guard trace handles the noise extraction function.
2Object-affected harmful factors
If the chip area is increased to reduce coupling noise, then the coupling noise is suppressed, but the manufacturing cost increases
Solution Approach 1:
The guard trace serves as a cost-effective intermediary solution that provides noise suppression without requiring larger chip area. This approach avoids the increased manufacturing costs associated with larger chips while effectively addressing coupling noise through the strategically positioned guard trace and its grounding structure.
3Object-affected harmful factors
If the guard trace is positioned close to the first segment to suppress coupling noise, then the noise suppression is improved, but the layout complexity increases
Solution Approach 1:
The trace structure is divided into segments, with the first segment positioned adjacent to the guard trace for optimal noise suppression. This segmentation allows the critical noise-sensitive portion to be closely coupled with the guard trace while other portions can be routed more freely, managing layout complexity through strategic segmentation rather than requiring complex overall routing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively suppresses coupling noise by altering the magnetic fields induced by current signals, canceling them out and reducing interference without the need for larger chip layouts.
Implementation Method 1
A phase or a direction of a first current signal conducted on the first trace is changed in the first segment
Implementation Method 2
effectively suppresses coupling noise by altering the magnetic fields induced by current signals, canceling them out
Data Source
AI summary
A semiconductor device includes an electronic device, a guard trace and a first trace. The guard trace is connecting to a ground layer through a first ground via. The first trace is disposed adjacent to the electronic device and the guard trace and includes a first segment. A phase or a direction of a first current signal conducted on the first trace is changed in the first segment. The electronic device and the first trace are disposed at different sides of the guard trace and the first ground via is beside the first segment.