Guest Branch Counting in Virtualized Systems

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Solution Overview

Problem

Existing virtualization technologies face challenges in accurately counting branch instructions for logging and replaying execution in virtualized computing environments due to limitations in processor architecture, which affects fidelity and reliability in debugging, fault tolerance, and trace-driven simulations.

Innovation Solution

A computer-implemented method and virtualized computer system that execute guest instructions in direct execution mode, using hardware performance counters to precisely count branch instructions by maintaining a first privilege level branch count and adjusting for control transfers and System Management Mode interrupts, ensuring accurate tracking of execution points for logging and replay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If hardware performance counters are used to count branch instructions in direct execution mode, then measurement precision is improved, but device complexity increases due to the need to track multiple privilege levels and control transfers

Engineering Contradiction:
Improvebranch instruction counting accuracyVSAvoidprivilege level tracking complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the branch counting task by privilege level. It maintains separate branch count registers for different privilege levels (e.g., ring 0 and ring 3) and uses privilege level-specific counters to track branches at each level. This segmentation allows accurate counting without requiring a single complex counter to handle all privilege levels, thereby reducing overall system complexity while maintaining precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism in the form of a branch count adjustment register or buffer that mediates between the hardware performance counters and the final branch count calculation. This intermediary stores raw counter values and applies corrections for control transfers and System Management Mode interrupts, simplifying the main counting logic while ensuring accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If control transfer to direct execution mode is detected and branch count is adjusted, then measurement precision is improved, but loss of time increases due to additional detection and adjustment operations

Engineering Contradiction:
Improvebranch instruction counting accuracyVSAvoidtime for detection and adjustment
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-configuring the branch count adjustment mechanism before control transfers occur. The system pre-establishes the relationship between hardware counters and privilege levels, and pre-calculates adjustment factors for common control transfer scenarios. This allows rapid detection and adjustment without requiring complex real-time calculations, thereby minimizing time loss while maintaining precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where the system continuously monitors control transfer events and automatically adjusts branch counts based on detected transfers. The feedback loop detects control transfers to direct execution mode, retrieves the appropriate branch count from the adjusted counter, and updates the final count accordingly. This automated feedback reduces manual intervention time while ensuring accurate measurement.

Inventive Principle:
Principle #23Feedback

3Reliability

If System Management Mode interrupts are handled correctly, then reliability is improved, but device complexity increases due to additional interrupt handling logic

Engineering Contradiction:
Improveexecution tracking accuracyVSAvoidinterrupt handling complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the System Management Mode interrupt handling logic from the main execution flow. It creates a separate interrupt service routine or handler that专门 processes SMI events, isolating this complex logic from the general branch counting mechanism. This extraction allows reliable handling of SMI interrupts without complicating the core counting functionality, as the interrupt handler can independently manage the complexity of SMI-related branch count adjustments.

Inventive Principle:
Principle #2Taking out (Extraction)

4Measurement precision

If hardware performance counters are enabled for precise counting, then measurement precision is improved, but productivity decreases due to overhead from counting operations

Engineering Contradiction:
Improvebranch instruction counting accuracyVSAvoidexecution speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent enables the hardware performance counters to perform self-service by utilizing the processor's built-in counting capabilities without requiring software intervention. The hardware counters automatically track branch instructions at the appropriate privilege levels, and the system simply reads these pre-computed values. This self-service approach eliminates the need for software-based counting loops, thereby maintaining high execution speed while achieving precise measurement.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9027003B2Precise branch counting in virtualization systems
Publication Date: 2015.05.05 VMWARE INC
  • US9027003B2 patent drawing
  • US9027003B2 patent drawing
  • US9027003B2 patent drawing

AI summary

A method for precisely counting guest branch instructions in a virtualized computer system is described. In one embodiment, guest instructions execute in a direct execution mode of the virtualized computer system. The direct execution mode operates at a first privilege level having a lower privilege than a second privilege level. A branch count of previously executed first privilege level branch instructions is maintained as instructions execute. Execution of a first privilege level branch instruction caused by a control transfer to the direct execution mode is detected. Responsive to the detection, a guest branch instruction count is determined based on the first privilege level branch count.