Gyro Sensor Signal Processing Circuit Noise Reduction

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Solution Overview

Problem

Existing gyro sensors face challenges in reducing noise while maintaining detection accuracy and minimizing circuit area, as noise folds back to the DC band due to sampling processes, requiring increased sampling frequencies that necessitate additional circuitry like phase locked loops, which increase circuit size.

Innovation Solution

A signal processing circuit that includes a current/voltage conversion section, phase shift section, drive amplitude control section, reference signal generation, clock signal generation, and switched capacitor filter, which generates a clock signal with a frequency twice the drive frequency using a phase difference, eliminating the need for a multiplying circuit and reducing noise without increasing circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the sampling frequency of the SCF is increased to reduce noise folding back to the DC band, then noise reduction is improved, but additional circuitry (multiplying circuit/PLL) is required which increases circuit area

Engineering Contradiction:
ImprovenoiseVSAvoidcircuit area
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent changes the clock signal frequency parameter from equal to the drive frequency to twice the drive frequency. This parameter change allows the SCF to reduce noise folding back to the DC band without requiring additional multiplying circuits, thus achieving noise reduction while maintaining compact circuit area.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent dynamically generates the clock signal at twice the drive frequency by utilizing the phase difference between the reference signal and the switch control signal. This dynamic approach eliminates the need for static additional circuitry like PLL, achieving flexible frequency multiplication within the existing circuit framework.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the sampling frequency is set to equal the drive frequency to meet reduction in size demands, then circuit area is reduced, but noise folds back to the DC band reducing detection accuracy

Engineering Contradiction:
Improvecircuit areaVSAvoiddetection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent changes the clock signal frequency parameter from equal to the drive frequency to twice the drive frequency. This parameter change allows the SCF to reduce noise folding back to the DC band without requiring additional multiplying circuits, thus achieving noise reduction while maintaining compact circuit area.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent converts the phase difference between the reference signal and switch control signal, which could be considered a harmful factor affecting signal accuracy, into a beneficial resource for generating the clock signal at twice the drive frequency. This eliminates the need for additional circuitry while improving noise performance.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces noise while maintaining detection accuracy and minimizing circuit size by generating a clock signal twice the drive frequency, thereby reducing noise folding into the DC band and improving detection sensitivity.

Implementation Method 1

a current/voltage conversion section that converts an oscillation current of the vibrator into a voltage

Methodology Applied
Scientific EffectElectrical conversion:

Implementation Method 2

a phase shift section that shifts a phase of a signal that has been converted into a voltage by the current/voltage conversion section

Methodology Applied
Scientific EffectPhase shifting:

Implementation Method 3

full-wave rectifies a signal that has been shifted in phase by the phase shift section based on the switch control signal

Methodology Applied
Scientific EffectFull-wave rectification:

Implementation Method 4

a synchronous detection section that synchronously detects a signal that includes the detection signal of the vibrator based on the reference signal

Methodology Applied
Scientific EffectSynchronous detection: Homodyne Detection

Implementation Method 5

a switched capacitor filter that filters a signal that has been synchronously detected by the synchronous detection section based on the clock signal

Methodology Applied
Scientific EffectSwitched capacitor filtering: Filter (electronic)

Implementation Method 6

causes a vibrator to oscillate

Methodology Applied
Scientific EffectVibration: Vibration

Implementation Method 7

a vibrating gyro sensor that utilizes the resonance phenomenon of a crystal vibrator

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS9046366B2Signal processing circuit, physical quantity detection apparatus, angular velocity detection apparatus, integrated circuit device, and electronic instrument
Publication Date: 2015.06.02 SEIKO EPSON CORP
  • US9046366B2 patent drawing
  • US9046366B2 patent drawing
  • US9046366B2 patent drawing

AI summary

A signal processing circuit includes an I/V conversion circuit (current/voltage conversion section) that converts an oscillation current of a vibrator into a voltage, an RC filter (phase shift section) that shifts a phase of the output signal of the I/V conversion circuit, a full-wave rectifier (part of a drive amplitude control section) that binarizes a signal that has been shifted in phase to generate a switch control signal, a comparator (reference signal generation section) that generates a reference signal for synchronous detection based on the output signal of the I/V conversion circuit, and an EXOR circuit (clock signal generation section) that generates a clock signal for a switched capacitor filter (SCF) that has a frequency twice a frequency of a drive signal based on a phase difference between the reference signal and the switch control signal.