H Bridge Gate Driver Sub-Threshold Biasing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional H bridge circuits without Schottky diodes experience minority carrier injection and performance degradation due to parasitic NPN device activation during dead time, leading to increased power dissipation and reliability issues.
Innovation Solution
A new gate drive method for H bridge circuits where the gate voltage of the NMOS device is biased between 0.1V to 0.4V during dead time, reducing current in the body diode and parasitic NPN device by operating in the sub-threshold region, thereby minimizing power dissipation and minority carrier injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the gate drive voltage is 0V during dead time, then the circuit structure is simple, but minority carrier injection occurs and parasitic NPN device activates causing performance degradation
Solution Approach 1:
The patent changes the gate drive voltage parameter from 0V to a positive voltage (0.1V-0.4V) during dead time. This parameter change keeps the NMOS device in sub-threshold region, preventing parasitic NPN activation and minority carrier injection while maintaining simple circuit structure without requiring additional components.
Solution Approach 2:
The patent applies periodic gate drive voltage with different values during different time periods: 0V during normal operation and 0.1V-0.4V during dead time. This periodic action effectively prevents parasitic effects only when needed (during dead time) without affecting normal circuit operation.
2Ease of operation
If the gate drive voltage is 0V during dead time, then the circuit operation is simple, but power dissipation increases due to large current in parasitic NPN device
Solution Approach 1:
By changing the gate drive voltage parameter to 0.1V-0.4V during dead time, the patent reduces parasitic NPN current and body diode current, thereby significantly reducing power dissipation during dead time while maintaining simple circuit operation during normal operation.
3Device complexity
If no Schottky diode is used in the H bridge circuit, then the device complexity is reduced, but parasitic NPN device activation occurs during dead time
Solution Approach 1:
The patent eliminates the need for Schottky diode by changing the gate drive voltage parameter during dead time. The positive voltage (0.1V-0.4V) during dead time prevents parasitic NPN activation through sub-threshold operation, achieving the same protective function without adding complex Schottky diode components.
Data Source
AI summary
An H bridge circuit includes a gate driver circuit coupled to a gate of an NMOS device. The output of the gate driver circuit is at a voltage from 0.1V to 0.4V during a dead time of the H bridge circuit. The gate voltage of the NMOS device is biased at 0.1˜0.4V to overcome the problems of minority carrier injection and power dissipation as compared with VG=0 in a conventional H bridge circuit.