H.264 Syntax Parser Parallel Processing for Latency Reduction
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Solution Overview
Problem
H.264 compliant video decoders face inefficiencies due to sequential processing of slice headers, leading to increased latency and processing time, as they require parsing and application of Sequence Parameter Sets (SPS) and Picture Parameter Sets (PPS) in a sequential manner, which delays the processing of subsequent slices.
Innovation Solution
Allocating multiple regions in internal memory for concurrent storage and processing of slice headers, allowing for simultaneous application of SPS and PPS across different stages of the video processing pipeline, thereby reducing latency by enabling parallel processing of multiple slices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If sequential processing of slice headers is used, then processing simplicity is maintained, but processing latency increases and decoding speed decreases
Solution Approach 1:
The patent divides the processing structure into multiple parallel pipelines, where each pipeline can independently process slice headers and parameter sets. This segmentation allows concurrent processing of multiple slices without increasing the complexity of individual processing units, thereby improving decoding speed while maintaining manageable device complexity.
Solution Approach 2:
The patent transitions from sequential (one-dimensional) processing to parallel (multi-dimensional) processing by introducing multiple processing pipelines that operate simultaneously. This dimensional change enables multiple slice headers to be processed concurrently, significantly reducing processing latency and improving overall decoding speed.
2Productivity
If concurrent storage of multiple slice headers is implemented, then processing parallelism is enabled, but memory resource requirements increase
Solution Approach 1:
The patent implements preliminary action by pre-loading and storing multiple parameter sets (SPS and PPS) in memory before they are needed for decoding. This allows the parallel processing pipelines to access required parameter sets immediately without waiting for sequential retrieval, thereby improving processing throughput while managing memory resource consumption through advance preparation.
3Loss of time
If multiple parameter sets are transferred to internal memory concurrently, then processing latency is reduced, but memory bandwidth requirements increase
Solution Approach 1:
The patent merges the transfer operations of multiple parameter sets into a single coordinated memory access pattern. By combining the transfer of SPS and PPS parameter sets into unified memory operations, the system reduces the total number of separate memory transactions, thereby lowering memory bandwidth consumption while still achieving concurrent availability of multiple parameter sets for parallel processing pipelines.
Data Source
AI summary
A method of processing H.264 compliant can include allocating a plurality of regions in a memory internal to an H.264 compliant syntax parser circuit for concurrent storage of a plurality of slice headers associated with respective H.264 slice data to be processed. Related circuits and computer program products are also disclosed.