Hafnium-Lanthanum Metal Gate Stack for Poly Depletion Mitigation
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Solution Overview
Problem
MOS devices with polysilicon gate electrodes suffer from carrier depletion effects, leading to increased effective gate dielectric thickness and difficulty in creating an inversion layer, which affects the performance of NMOS and PMOS devices.
Innovation Solution
The formation of metal gate electrodes with multiple layers, including hafnium oxide and lanthanum oxide layers, is used to achieve band-edge work functions for NMOS and PMOS devices, replacing dummy gate stacks and forming Fin Field-Effect Transistors (FinFETs) to mitigate the poly depletion effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If polysilicon gate electrodes are used, then the work function can be adjusted to the band-edge of silicon, but carrier depletion effect occurs leading to increased effective gate dielectric thickness
Solution Approach 1:
The patent employs composite gate electrode structures combining multiple materials (polysilicon with metal layers, or fully metal gate stacks) to achieve both work function adjustment and eliminate carrier depletion effects. The composite structure allows tuning of electrical properties while maintaining physical integrity of the gate.
Solution Approach 2:
The patent changes the material composition parameters of the gate electrode by introducing metal layers with specific work functions or using doped polysilicon with controlled impurity concentrations. This parameter adjustment enables precise control over the gate's electrical characteristics while avoiding the depletion effect.
2Object-affected harmful factors
If metal gate electrodes are formed to solve poly depletion effect, then a plurality of layers are required to meet NMOS and PMOS device requirements, but device structure becomes more complex
Solution Approach 1:
The gate electrode is segmented into multiple functional layers, each with specific thickness and material composition optimized for either NMOS or PMOS devices. This segmentation allows independent optimization of each layer's properties to meet different device requirements while maintaining a systematic structure.
Solution Approach 2:
Different regions of the gate electrode structure are assigned different material compositions and thicknesses tailored to specific device types (NMOS vs PMOS). The local quality varies across the gate structure to optimize performance for different transistor types within the same integrated circuit.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the poly depletion effect, improving the performance of transistors by enhancing the formation of inversion layers and reducing leakage current, while preventing lanthanum diffusion into silicon oxide layers.
Implementation Method 1
The formation of metal gate electrodes with multiple layers, including hafnium oxide and lanthanum oxide layers
Implementation Method 2
The work function of the gate electrode may be adjusted to the band-edge of silicon. For an n-type Metal-Oxide-Semiconductor (NMOS) device, the work function may be adjusted to close to the conduction band of silicon. For a P-type Metal-Oxide-Semiconductor (PMOS) device, the work function may be adjusted to close to the valence band of silicon
Data Source
AI summary
A method includes forming a gate stack of a transistor. The formation of the gate stack includes forming a silicon oxide layer on a semiconductor region, depositing a hafnium oxide layer over the silicon oxide layer, depositing a lanthanum oxide layer over the hafnium oxide layer, and depositing a work-function layer over the lanthanum oxide layer. Source/drain regions are formed on opposite sides of the gate stack.