Charge Storage Layer Composition for 3D Memory Cell Efficiency
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Solution Overview
Problem
In semiconductor memory devices with three-dimensional structures, the miniaturization of memory cells leads to reduced charge trapping efficiency due to thin charge storage layers, affecting operation characteristics such as write and erase operations.
Innovation Solution
Incorporating a charge storage layer with a compound containing hafnium oxide or zirconium oxide and a low valence material like aluminum, with a concentration of 15 atomic % or more, positioned closer to the tunnel film to enhance charge trapping efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the charge storage layer is made thin to miniaturize the memory cell, then the memory cell size is reduced, but the charge trapping efficiency deteriorates
Solution Approach 1:
The charge storage layer is designed with non-uniform aluminum concentration distribution, where the aluminum concentration is higher (15 atomic % or more) in the region closer to the tunnel film and lower in the region closer to the block film. This local variation in composition optimizes charge trapping efficiency in the critical region near the tunnel film while maintaining overall layer thinness for miniaturization.
Solution Approach 2:
The charge storage layer is formed as a composite material containing hafnium oxide or zirconium oxide combined with aluminum at specific concentrations. This composite structure leverages the high dielectric constant of hafnium/zirconium oxide for effective charge storage while aluminum provides additional trapping sites, achieving both miniaturization and maintained trapping efficiency.
2Productivity
If the charge storage layer is made thin to improve miniaturization, then the memory cell density increases, but the operation characteristics deteriorate
Solution Approach 1:
By concentrating aluminum in the region closer to the tunnel film where charge trapping is most critical for write and erase operations, the invention maintains high operation characteristics even with thin charge storage layers that enable increased memory cell density.
Solution Approach 2:
The invention changes the compositional parameters of the charge storage layer by incorporating aluminum at controlled concentrations (15 atomic % or more near the tunnel film). This parameter modification enhances charge trapping efficiency and operation characteristics while allowing the layer to remain thin for high density.
3Reliability
If aluminum concentration is increased to enhance charge trapping, then the charge storage efficiency improves, but the manufacturing complexity increases
Solution Approach 1:
The aluminum concentration is varied locally within the charge storage layer rather than being uniformly distributed. This approach achieves high charge storage efficiency through localized aluminum enrichment near the tunnel film while using standard thin-film deposition techniques, avoiding the need for complex multi-step manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves charge storage efficiency and write characteristics by increasing the erasing efficiency and preventing energy loss during the erasing operation, thereby enhancing the overall performance of memory cells.
Implementation Method 1
The charge storage layer has a function of trapping charges in the layer, the charges are transferred between the charge storage layer and the channel
Implementation Method 2
The charge storage layer contains a compound including at least one of hafnium oxide or zirconium oxide and a first material having a valence lower than that of at least one of the hafnium oxide or the zirconium oxide
Data Source
AI summary
A semiconductor memory device includes a stacked body, a semiconductor portion, a first insulating film, a charge storage layer, and a second insulating film. The stacked body has a plurality of electrode layers stacked in a spaced apart manner from each other. The semiconductor portion is provided in the stacked body and extends in a first direction where the plurality of electrode layers are stacked. The first insulating film is provided between the plurality of electrode layers and the semiconductor portion. The charge storage layer is provided between the plurality of electrode layers and the first insulating film and contains a compound including at least one of hafnium oxide or zirconium oxide and a first material having a valence lower than that of the at least one of the hafnium oxide or the zirconium oxide.