Hardware Abstraction Layer for ASIC Forwarding Behavior Mapping
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Solution Overview
Problem
Conventional Software Defined Networking (SDN) approaches fail to fully leverage the architecture of target devices in implementing forwarding behavior, leading to inefficient network operations and potential exposure of proprietary information.
Innovation Solution
A Hardware Abstraction Layer (HAL) is used to analyze an abstract candidate device model, mapping intended forwarding behavior to the capabilities of a target device with ASIC or FPGA hardware, ensuring implementation efficiency and confidentiality of vendor-specific information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional SDN approaches are used to implement forwarding behavior, then device control is simplified, but the target device architecture is not fully leveraged leading to inefficient network operations
Solution Approach 1:
The patent introduces an intermediary layer between the controller and the target device that translates abstract forwarding behavior specifications into architecture-specific implementations. This intermediary enables the system to leverage the full capabilities of the target device architecture while maintaining the simplicity of abstract control, thereby resolving the contradiction between operational efficiency and implementation complexity.
Solution Approach 2:
The system dynamically adapts the forwarding plane implementation to match the specific architecture of the target device. By making the implementation dynamic and architecture-aware, the system can optimize network operations for each specific device while maintaining a unified abstract control interface, thus improving productivity without proportionally increasing complexity.
2Adaptability or versatility
If vendor-specific control software is exposed for implementing forwarding behavior, then device capabilities are fully utilized, but proprietary information is exposed
Solution Approach 1:
The patent extracts the vendor-specific implementation details from the controller and places them in the target device's forwarding plane. The controller only handles abstract forwarding behavior specifications, while the device-specific capabilities are utilized locally at the device level. This extraction maintains adaptability to device capabilities while protecting proprietary information from exposure to the controller or network operators.
Solution Approach 2:
The system implements local quality by keeping vendor-specific control software and proprietary information localized within the target device rather than exposing them centrally. Each device maintains its own architecture-specific implementation details locally, allowing full utilization of device capabilities while preventing widespread exposure of proprietary information.
3Productivity
If abstract forwarding behavior specifications are used without architecture mapping, then control is simplified, but implementation efficiency on specific hardware is reduced
Solution Approach 1:
The patent segments the forwarding plane implementation into two distinct parts: abstract forwarding behavior specifications (easy to operate) and architecture-specific mappings (efficient for hardware). This segmentation allows each part to be optimized independently - the abstract specifications remain simple while the hardware mappings are optimized for implementation efficiency, resolving the contradiction between ease of operation and productivity.
Data Source
AI summary
A Hardware Abstraction Layer (HAL) for a target computing device that is equipped with an Application Specific Integrated Circuit (ASIC) or other hardware element that provides forwarding and/or switching capability is used to analyze an abstract candidate device model. The abstract candidate device model is received from a controller and specifies intended forwarding behavior for the target device. The HAL analyzes the abstract candidate device model based on its knowledge of the architecture of the ASIC or other hardware element providing forwarding or switching capability to the target device. If the behavior is supported by the target device's architecture, the model may be implemented in a specific manner supported by that architecture and used to control forwarding behavior on the target device.