Half-Bridge FET Driver Cascode Clamp for ESD Voltage Range
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Solution Overview
Problem
Existing power converter driver circuits face a trade-off between operating voltage range and electrostatic discharge (ESD) protection due to limited combinations of high-voltage transistors and HBM clamp circuits, leading to reduced operating voltage capabilities.
Innovation Solution
Implementing a cascode transistor configuration with a voltage clamp circuit and high-voltage switches to isolate the transistor during ESD events, allowing the clamp voltage to be shared across the transistor and cascode device, thereby extending the operating voltage range while maintaining ESD protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an HBM clamp circuit is used to protect power transistors from ESD-induced voltage spikes, then ESD protection is improved, but the operating voltage range is limited due to the need to clamp voltage below the transistor breakdown voltage
Solution Approach 1:
The voltage protection function is segmented between two transistors: the original power transistor and an additional cascode transistor. The cascode transistor is inserted between the power transistor and the HBM clamp circuit, dividing the voltage protection task. This allows the HBM clamp circuit to operate at higher voltages while the power transistor remains protected within its safe operating range.
Solution Approach 2:
The cascode transistor acts as an intermediary device between the power transistor and the HBM clamp circuit. It mediates the voltage relationship by providing an additional voltage blocking layer, allowing the HBM clamp circuit to clamp at a voltage higher than the power transistor's breakdown voltage without exposing the power transistor to damaging voltage levels.
2Reliability
If the HBM clamp circuit clamps voltage below the transistor breakdown voltage to protect the transistor, then transistor safety is improved, but the driver circuit cannot operate at its full rated voltage capability
Solution Approach 1:
The voltage blocking capability is segmented between two transistors in a cascode configuration. The HBM clamp circuit voltage rating can exceed the power transistor breakdown voltage because the cascode transistor absorbs the excess voltage stress, allowing the driver to operate at higher voltages while maintaining transistor safety.
3Device complexity
If limited combinations of high-voltage transistors and HBM clamp circuits are used, then design simplicity is maintained, but ESD protection effectiveness is reduced
Solution Approach 1:
The cascode transistor configuration provides multiple functions: it extends the effective voltage rating of the power transistor, enables the HBM clamp circuit to operate at higher voltages, and maintains compatibility with existing transistor combinations. This universal approach allows designers to use standard high-voltage transistors with HBM clamp circuits without requiring specialized matched pairs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The cascode configuration effectively isolates the transistor from damaging voltage spikes, enabling the driver circuit to operate at its full rated voltage without compromising ESD protection.
Implementation Method 1
electrostatic discharge (ESD) protection circuitry to prevent or reduce damage in the event of ESD-induced voltage spikes
Implementation Method 2
HBM clamp circuit should limit the voltage to a level that is less than the breakdown voltage of the power transistors
Data Source
AI summary
In one example, a circuit includes a first transistor having a first terminal coupled to a first supply voltage source, a second transistor coupled between a second terminal of the first transistor and a ground terminal, and a voltage clamp circuit coupled between the first supply voltage source and the ground terminal. The circuit may further include a first switch coupled between a control terminal of the first transistor and a second supply voltage source, the first switch having a control terminal coupled to the second terminal of the first transistor, a second switch coupled between a control terminal of the second transistor and the second supply voltage source, the second switch having a control terminal coupled to the ground terminal, and a filter coupled between the control terminal of the second transistor and the ground terminal.