Half-Bridge Semiconductor Package With Integrated Gate Driver

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Solution Overview

Problem

Conventional power semiconductor module arrangements are large and expensive, necessitating a need for a smaller, more cost-effective solution with optimized performance and high current ratings.

Innovation Solution

A semiconductor arrangement comprising a first and second controllable semiconductor device forming a half-bridge configuration, integrated with a gate driver and lead frames within a molded package, where the lead frames are partially covered by the package, allowing for compact design and efficient electrical coupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional power semiconductor module arrangements are used, then reliable power switching function is achieved, but the size and cost increase

Engineering Contradiction:
Improvepower switching functionVSAvoidmodule size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent combines multiple semiconductor devices (first controllable semiconductor device, second controllable semiconductor device, and gate driver) into a single molded package, integrating functions that would traditionally require separate modules. This merging reduces overall size while maintaining reliable power switching functionality through compact arrangement of all necessary components within one housing.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If conventional power semiconductor module arrangements are used, then reliable power switching function is achieved, but the cost increases

Engineering Contradiction:
Improvepower switching functionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By integrating multiple devices and the gate driver into a single molded package, the patent reduces the number of separate components that need to be manufactured, handled, and assembled. This consolidation lowers manufacturing complexity and cost while maintaining the reliable power switching function through proper electrical coupling of all integrated components.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If discrete power packages are used instead of module arrangements, then cost and performance are improved, but integration and electrical coupling become more complex

Engineering Contradiction:
Improvecost and performanceVSAvoidintegration complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent resolves the complexity issue by merging all discrete components (semiconductor devices and gate driver) into a single integrated package with internal electrical couplings. This eliminates the need for external wiring and complex assembly, as all electrical connections are established during the molding process, simplifying integration while maintaining cost and performance benefits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The molded package itself acts as an intermediary structure that provides both mechanical housing and electrical coupling pathways. The package integrates mounting surfaces, electrical connections, and protective encapsulation, serving as a mediator that simplifies the interface between internal components and external circuitry while reducing overall system complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260026406A1Semiconductor arrangement
Publication Date: 2026.01.22 INFINEON TECH AUSTRIA AG
  • US20260026406A1 patent drawing
  • US20260026406A1 patent drawing
  • US20260026406A1 patent drawing

AI summary

A semiconductor arrangement includes first and second controllable semiconductor devices forming a half-bridge arrangement, each controllable semiconductor device including a control electrode and a controllable load path between a first load electrode and a second load electrode. At least one gate driver is configured to generate one or more control signals for one or more of the controllable semiconductor devices. The first controllable semiconductor device is arranged on and electrically coupled to a first lead frame of a plurality of lead frames. The second controllable semiconductor device is arranged on and electrically coupled to a second lead frame of the plurality of lead frames. The controllable semiconductor devices and the at least one gate driver are arranged in a molded package. Each lead frames is partly covered by the molded package and has at least one surface or section that is not covered by the molded package.