Half-Bridge HEMT Backside Electrode Layout for Cross-Talk Isolation
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Solution Overview
Problem
The integration of high electron mobility transistors (HEMTs) in half-bridge circuits for semiconductor devices faces challenges due to cross-talk issues when high-side and low-side switching elements share the same substrate, making it difficult to implement in system-on-a-chip (SoC) systems.
Innovation Solution
A semiconductor device design that includes HEMTs with an improved backside electrode configuration, where the backside electrode of the high-side switching element is electrically connected to a ground terminal or is an electrically floating layer, eliminating parasitic capacitance and avoiding limitations on power supply voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If HEMTs are integrated in a half-bridge circuit on the same substrate, then system-on-a-chip integration is achieved, but cross-talk between high-side and low-side switching elements occurs
Solution Approach 1:
The substrate is divided into first and second device regions with distinct electrical configurations. The high-side HEMT in the first region has its backside electrode connected to a higher potential (or floating), while the low-side HEMT in the second region has its backside electrode connected to ground potential. This spatial and electrical segmentation isolates the two switching elements, reducing cross-talk while maintaining integration benefits.
Solution Approach 2:
Different electrical potentials are applied to different regions of the substrate. The first device region operates with a different backside electrode potential configuration compared to the second device region. This local differentiation in electrical conditions allows each HEMT to operate independently with optimized performance, minimizing interference between regions.
2Device complexity
If the backside electrode is connected to the source electrode, then electrical connection is simplified, but parasitic capacitance increases and power supply voltage is limited
Solution Approach 1:
Instead of connecting the backside electrode to the source electrode as in conventional designs, the invention inverts this approach by connecting the backside electrode to a different potential (ground for low-side HEMT, or floating/higher potential for high-side HEMT). This inversion eliminates the direct capacitive coupling between backside and source electrodes, reducing parasitic capacitance and removing voltage limitations while maintaining structural simplicity.
Data Source
AI summary
A semiconductor device includes an insulating layer, a semiconductor layer, and a compound semiconductor stacked layer disposed on a substrate in sequence, a first transistor, a second transistor, an isolation structure, and a conductive structure. The first transistor is disposed in a first device region and on the compound semiconductor stacked layer. The second transistor is disposed in a second device region and on the compound semiconductor stacked layer. The isolation structure is disposed between the first and second transistors. The conductive structure is disposed in the second device region, passes through the compound semiconductor stacked layer, and electrically connects the semiconductor layer to a second source of the second transistor. There is no electrical connection between the semiconductor layer in the first device region and a first source of the first transistor.