Half-Bridge Power Module Layout for Inductance and Heat Dissipation
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Solution Overview
Problem
Semiconductor power modules experience increased heat and reduced current output capacity due to compact internal chip arrangements, which lead to elevated parasitic inductance.
Innovation Solution
A semiconductor power module design featuring orthogonal conductive regions and power chips arranged to form half-bridge circuits, reducing parasitic inductance and enhancing heat dissipation through a substrate with good thermal conductivity and a copper layer configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If internal chips are arranged compactly within a whole conductive region, then integration degree is improved, but parasitic inductance increases and heat dissipation deteriorates
Solution Approach 1:
The conductive region is divided into multiple separate conductive regions (first, second, third, fourth conductive regions) instead of using a single whole conductive region. This segmentation allows for optimized current paths and reduces parasitic inductance while maintaining high integration through the structured arrangement of these separate regions.
Solution Approach 2:
The patent employs asymmetric arrangement of conductive regions and power chips, where the first and second conductive regions extend along the first direction while the third and fourth conductive regions are arranged along the second direction. This asymmetric layout optimizes current flow patterns to reduce parasitic inductance.
2Device complexity
If internal chips are arranged compactly within a whole conductive region, then integration degree is improved, but heat dissipation deteriorates
Solution Approach 1:
The conductive region is divided into multiple separate conductive regions (first, second, third, fourth conductive regions) instead of using a single whole conductive region. This segmentation allows for optimized current paths and reduces parasitic inductance while maintaining high integration through the structured arrangement of these separate regions.
Solution Approach 2:
Different conductive regions are assigned specific functions (DC signal transmission vs. AC signal transmission) and arranged in specific spatial configurations. The first and second conductive regions extend along the first direction while the third and fourth conductive regions are arranged along the second direction, creating local optimizations for both electrical performance and thermal management.
3Productivity
If parasitic inductance is reduced, then current output capacity is improved, but heat dissipation deteriorates
Solution Approach 1:
Different conductive regions are assigned specific functions (DC signal transmission vs. AC signal transmission) and arranged in specific spatial configurations. The first and second conductive regions extend along the first direction while the third and fourth conductive regions are arranged along the second direction, creating local optimizations for both electrical performance and thermal management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces parasitic inductance and improves heat dissipation, increasing current output capacity while maintaining a simple and high-integration structure.
Implementation Method 1
a substrate having a first direction and a second direction that are orthogonal to each other; a first conductive region, a second conductive region, a third conductive region and a fourth conductive region that are disposed on the substrate
Implementation Method 2
the first power chip and the second power chip are correspondingly electrically connected to the first conductive region, the second conductive region and the fourth conductive region, so as to form a first bridge arm of a half-bridge circuit. The third power chip is electrically connected to the fourth conductive region and the third conductive region to form a second bridge arm of the half-bridge circuit. Mutual inductance is formed between the first bridge arm and the second bridge arm to thereby reduce the parasitic inductance of the entire module.
Data Source
AI summary
A semiconductor power module, a motor controller, and a vehicle are disclosed. The semiconductor power module includes: a substrate; a first conductive region, a second conductive region, a third conductive region and a fourth conductive region that are disposed on the substrate; a first power chip, a second power chip and a third power chip. The first conductive region and the second conductive region extend along the first direction of the substrate and are arranged along the second direction of the substrate, the third conductive region and the fourth conductive region are located between the first conductive region and the second conductive region and are arranged along the first direction. The first conductive region, the second conductive region and the third conductive region are configured to transmit a direct current signal, and the fourth conductive region is configured to transmit an alternating current signal.