Half-Bridge Gate Driver for Negative Overcurrent Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power systems face challenges in managing negative load current, leading to high power dissipation and thermal stress due to the use of separate protection circuitries for positive and negative overcurrent protection, which increases complexity and costs.
Innovation Solution
A gate driver system that integrates a control circuit to monitor and regulate both positive and negative load currents, redirecting negative load current through the high-side transistor's gate-controlled conductive channel during overcurrent events, reducing power loss and thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If negative load current is redirected through the body diode of the high-side transistor to provide negative overcurrent protection, then protection function is achieved, but power dissipation increases significantly
Solution Approach 1:
The patent introduces an intermediary current redirecting circuit that includes a fourth transistor connected in parallel with the body diode of the high-side transistor. This intermediary component provides an alternative current path that bypasses the high-power-dissipating body diode, allowing negative load current to be redirected with significantly reduced power loss while maintaining the protection function.
Solution Approach 2:
The patent creates a parallel current path that copies the protection function of the body diode but with improved efficiency. The fourth transistor replicates the current redirecting capability while avoiding the inherent power dissipation issues of the body diode, effectively providing a 'better copy' of the protection mechanism.
2Reliability
If separate protection circuitries are provided for both positive and negative overcurrent protection, then comprehensive protection is achieved, but device complexity and area increase
Solution Approach 1:
The patent merges the positive and negative overcurrent protection functions into a unified control architecture. The control circuit monitors both current directions and uses a single integrated control logic to manage both protection modes, eliminating the need for completely separate protection circuitries while maintaining comprehensive protection coverage.
Solution Approach 2:
The control circuit is designed with universal functionality to handle both positive and negative overcurrent protection scenarios. By implementing a multi-functional control mechanism that can adapt to different current directions and fault conditions, the patent reduces overall system complexity while achieving comprehensive protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system effectively manages both positive and negative overcurrents, minimizing power dissipation and thermal stress while reducing hardware complexity and costs.
Implementation Method 1
turning on the high-side transistor such that the negative load current flows through a gate-controlled conductive channel of the high-side transistor
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.