Low-inductance Half-bridge Arrangement with Perpendicular Current Loops
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Solution Overview
Problem
Existing half-bridge arrangements in power electronics face challenges with high switching frequencies due to parasitic inductances, which lead to increased switching losses and heat dissipation issues, particularly at higher powers and frequencies, where traditional designs fail to optimize both leakage inductances and heat dissipation simultaneously.
Innovation Solution
A half-bridge arrangement with a circuit board featuring at least four trace layers to create perpendicular current loops during commutation events, producing opposing dipoles that cancel each other out, and a symmetrical capacitor arrangement to minimize parasitic inductance, along with a perpendicular driver current direction to reduce coupling with commutation currents, and a high copper fill factor for enhanced heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional half-bridge arrangements are used with standard circuit board designs, then the structure is simple and easy to manufacture, but parasitic inductances are high leading to increased switching losses
Solution Approach 1:
The patent transitions from a planar single-layer circuit board to a multi-layer three-dimensional configuration. The commutation circuit is routed through multiple trace layers (at least four layers) to create perpendicular current loops. This spatial arrangement produces opposing magnetic dipoles that cancel each other, significantly reducing parasitic inductance and switching losses while managing the increased structural complexity through systematic layer design.
2Productivity
If switching frequency is increased to improve productivity, then output per time increases, but switching losses increase due to higher frequency operations
Solution Approach 1:
The patent fundamentally changes the inductance parameter of the commutation circuit by implementing a multi-layer perpendicular routing structure. This reduces the parasitic inductance value, which directly lowers the switching losses (proportional to L di/dt). Consequently, the system can operate at higher switching frequencies with reduced energy loss, as the lower inductance compensates for the increased switching rate.
3Temperature
If copper layer thickness is increased to reduce resistance and improve heat dissipation, then heat dissipation improves, but parasitic inductances increase due to larger copper cross-sections and board edge ramps
Solution Approach 1:
The patent segments the copper current path into multiple thin layers rather than using a single thick copper layer. The commutation current is distributed across at least four trace layers, with perpendicular routing in adjacent layers. This segmentation maintains low inductance by minimizing loop area while the cumulative copper cross-section across all layers provides sufficient heat dissipation capacity.
4Loss of energy
If faster switching edges are implemented to reduce switching losses, then switching performance improves, but overvoltages increase and interference immunity decreases
Solution Approach 1:
The patent converts the harmful effect of fast switching edges (which generate overvoltages and EMI) into a benefit by using the multi-layer perpendicular structure to contain and cancel the resulting electromagnetic fields. The opposing dipoles created by perpendicular current loops in adjacent layers neutralize each other's radiation, allowing faster switching edges to be used for reduced switching losses without proportionally increasing overvoltages and interference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly reduces parasitic inductance, lowers switching losses, and improves heat dissipation, enabling higher switching frequencies with reduced noise emission and increased interference immunity, while maintaining effective cooling without additional cooling components.
Implementation Method 1
During a commutation event, at least two dipoles of opposite direction are produced in the circuit board. The parallel commutation circuits create currents that produce dipoles of opposite direction, causing their effects to be mutually attenuated, resulting in reduced parasitic inductance.
Implementation Method 2
a high copper fill factor for enhanced heat dissipation
Data Source
AI summary
The switching performance of a half-bridge arrangement particularly for a converter shall be improved. For this purpose, a half-bridge arrangement has a circuit board having at least four trace layers and two switching elements and a capacitor device arranged on opposite sides of the circuit board and interconnected so as to produce, during a commutation event of the half-bridge arrangement, at least two dipoles having opposite spatial directions.