Half-Bridge Power Module Layout for Balanced Si and SiC Current
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Solution Overview
Problem
Existing power semiconductor devices face issues with current imbalance due to differences in material and current paths between silicon (Si) and wide band gap (WBG) semiconductor elements, leading to complex design adjustments.
Innovation Solution
A power semiconductor device design with identical package shapes for Si and SiC half-bridge modules, where power terminals are positioned on short sides, and relay and diode modules are connected in parallel, ensuring equal inductances and reducing current imbalance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If Si and WBG semiconductor elements are connected in parallel in one power module, then power loss and cost can be reduced, but current imbalance becomes relatively large due to material differences and current path differences
Solution Approach 1:
The patent applies local quality by making the current paths of Si and WBG semiconductor elements locally identical through standardized package design. Specifically, the package structure, terminal positions, and internal wiring are made uniform for both Si and WBG modules, ensuring that the current flow characteristics are the same in the critical regions where materials differ. This allows the parallel connection to achieve reduced power loss while maintaining current balance.
Solution Approach 2:
The patent uses parameter changes by standardizing key electrical parameters of the current paths. The package inductance, resistance, and geometric dimensions are controlled to be identical for Si and WBG modules. By adjusting and matching these parameters through design, the patent enables parallel operation with balanced current distribution, resolving the contradiction between power loss reduction and current balance.
2Reliability
If drive timing of each semiconductor element is adjusted to suppress current imbalance, then current balance can be improved, but design becomes complicated
Solution Approach 1:
The patent applies equipotentiality by making the electrical characteristics of the current paths equal for Si and WBG semiconductor elements. Through standardized package design with identical terminal positions, wiring layouts, and inductance values, the patent creates equipotential conditions that naturally balance the current distribution. This eliminates the need for complex drive timing adjustments, as the balanced current flow is achieved through symmetric electrical characteristics rather than active control.
3Length of stationary object
If power terminals are provided on both short sides of the package, then current path length is reduced and inductance is minimized, but package structure becomes more constrained
Solution Approach 1:
The patent applies asymmetry in a controlled manner by providing power terminals on both short sides of the rectangular package. This asymmetric terminal arrangement (relative to the long sides) optimizes the current path geometry to minimize inductance and path length. The asymmetric design is compensated by making both short sides identical, creating a symmetric current flow pattern that reduces overall inductance while maintaining manufacturability through standardized fabrication processes.
Data Source
AI summary
A power semiconductor device includes a plurality of power modules. Outer shapes of packages of the plurality of power modules are the same. The plurality of power modules include a first half-bridge module made of a first semiconductor, and at least one of a second half-bridge module made of a second semiconductor, a second relay module made of a second semiconductor, and a second diode module made of a second semiconductor.