Half Buffer Circuit Slew Control With Lower I/O Delay
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Solution Overview
Problem
Conventional digital output buffer circuits are sensitive to loading capacitance and supply voltage variations, leading to increased propagation delay due to the complete charging and discharging of feedback capacitors, which affects speed and electromagnetic emission.
Innovation Solution
The implementation of a half buffer circuit with a switch network and feedback capacitor that remains partially charged or discharged, using a transconductor element and switch network to control the slewing of output voltage, allowing current to flow only when necessary, thereby reducing input/output delay and insensitivity to capacitance loading and supply voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional digital output buffer circuits use feedback capacitors for slew-rate control, then sensitivity to loading capacitance and supply voltage variations is reduced, but propagation delay increases due to complete charging and discharging of the feedback capacitor
Solution Approach 1:
The patent applies partial action by preventing the feedback capacitor from completely discharging. The switch network is configured to stop the discharge process before the capacitor reaches zero voltage, maintaining a residual charge. This partial discharge approach reduces the time required for capacitor charging/discharging cycles while still achieving slew-rate control, thereby reducing propagation delay without sacrificing sensitivity reduction
2Object-generated harmful factors
If the slew rate is controlled to reduce electromagnetic emission, then electromagnetic emission is reduced, but input/output delay increases
Solution Approach 1:
The switch network implements partial discharge of the feedback capacitor, preventing it from fully discharging during commutation. This reduces the total charge transfer required, thereby reducing electromagnetic emission while also reducing the time needed for the capacitor to recharge in the next cycle, thus reducing input/output delay
Solution Approach 2:
The circuit performs preliminary charging of the feedback capacitor during the commutation transition. By pre-charging the capacitor before the full slew is required, the circuit reduces the subsequent charging time needed, thereby reducing input/output delay while maintaining controlled electromagnetic emission through the switch network's regulated discharge
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces or eliminates input/output delay and makes output slew rates insensitive to capacitance loading and supply voltage variations, improving the speed and reducing electromagnetic emission of output buffer circuits.
Implementation Method 1
a feedback capacitor coupled between the first node and an output of the half buffer circuit
Data Source
AI summary
A half buffer circuit includes a current source coupled to a first node, a ground connection coupled to a second node, a feedback capacitor coupled between the first node and an output of the half buffer circuit, a transconductor element comprising a first input/output, a second input/output, and a transconductor element control input, and a switch network coupled between the first node and the second node. The first input/output is coupled to the output of the half buffer circuit. The second input/output is coupled to a ground connection. The switch network includes a first switch coupled between the first node and the second node, a second switch coupled between the first node and the transconductor element control input, and a third switch coupled between the second node and the transconductor element control input.