Half-Power Buffer Circuit for Polarity Inversion Stability
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Solution Overview
Problem
Liquid crystal display devices with high resolution face increased power consumption due to the need for multiple output buffers, which degrades display quality and battery life in portable devices, and existing half-power buffers struggle to prevent abnormal outputs during polarity inversion.
Innovation Solution
A half-power buffer and amplifier design that differentially amplifies input signals using a configuration of transistors and charge share switches, allowing for controlled voltage equilibration and reduced power consumption, preventing abnormal outputs during polarity inversion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of output buffers is increased to achieve high resolution, then display quality is improved, but power consumption increases
Solution Approach 1:
The output buffer is divided into two separate buffers that operate in alternating time periods. Each buffer handles half of the output tasks at a given time, allowing the system to achieve full resolution capability while each individual buffer operates at reduced power consumption. The segmentation of functionality across time and space resolves the contradiction between high display quality and low power consumption.
2Use of energy by moving object
If a half-power output buffer is used to reduce power consumption, then energy efficiency is improved, but abnormal outputs occur during polarity inversion
Solution Approach 1:
Before polarity inversion occurs, the switching unit pre-adjusts the connection state to ensure smooth transition between buffers. The first buffer prepares to take over or hand off to the second buffer in advance of the polarity change, preventing abnormal outputs. This preliminary action ensures reliability during the critical transition period while maintaining the low-power half-buffer operation.
3Manufacturing precision
If offset characteristics are reduced by increasing the size of matching pairs, then display quality is improved, but chip area increases
Solution Approach 1:
Instead of using one large buffer with large matching pairs that would consume excessive chip area, the system segments the buffer into two smaller buffers operating alternately. Each buffer has smaller matching pairs, reducing individual buffer area. The alternating operation maintains overall display quality while the segmentation significantly reduces total chip area compared to a single high-precision buffer.
Data Source
AI summary
A half-power buffer and/or amplifier is disclosed. The half-power buffer and/or amplifier includes an amplifying unit including first and second transistors connected between a first voltage source having a first voltage and a third voltage source having a third voltage, and a first output node configured to connect the first and second transistors and to output a voltage over a first voltage range between the first and third voltages, a second output buffer unit including third and fourth transistors connected between a second voltage source having a second voltage and the third voltage source, and a second output node configured to connect the third and fourth transistors and to output a voltage over a second voltage range between the second and third voltages, and a first charge share switch unit connected between the gate of the second transistor and the first voltage source, and configured to perform a charge share and/or equalization operation.