Halftone Mask for LTPS Array Substrate Patterning

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Solution Overview

Problem

The manufacture process of Low Temperature Poly-silicon (LTPS) array substrates is complex and costly due to the need for multiple masks in the patterning and doping processes, which increases production expenses.

Innovation Solution

A halftone mask is used to simplify the pattern process and N-type heavy doping of the polysilicon layer, reducing the number of masks required and thereby lowering production costs, while maintaining fine electronic properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple masks are used for polysilicon patterning, channel doping, and N-type heavy doping, then the manufacturing precision is improved, but the device complexity and production cost increase

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines the polysilicon patterning process and N-type heavy doping process into a single exposure and development step using a halftone mask. The halftone mask's varying optical density regions allow simultaneous formation of polysilicon patterns and doping regions, merging two previously separate mask-based processes into one, thereby reducing process complexity while maintaining manufacturing precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The halftone mask serves multiple functions: it acts as both the patterning mask for polysilicon and the doping mask for N-type heavy doping. The mask's different optical density regions enable it to perform multiple roles in a single exposure step, eliminating the need for separate masks and reducing overall process complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple masks are used for polysilicon patterning, channel doping, and N-type heavy doping, then the manufacturing precision is improved, but the production cost increases

Engineering Contradiction:
Improvepatterning precisionVSAvoidproduction cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent combines the polysilicon patterning process and N-type heavy doping process into a single exposure and development step using a halftone mask. The halftone mask's varying optical density regions allow simultaneous formation of polysilicon patterns and doping regions, merging two previously separate mask-based processes into one, thereby reducing process complexity while maintaining manufacturing precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The halftone mask serves multiple functions: it acts as both the patterning mask for polysilicon and the doping mask for N-type heavy doping. The mask's different optical density regions enable it to perform multiple roles in a single exposure step, eliminating the need for separate masks and reducing overall process complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces production costs by eliminating one mask and maintains the high electronic performance of the Low Temperature Poly-silicon array substrate.

Implementation Method 1

employing a halftone mask to implement exposure, development to the photoresist layer

Methodology Applied
Scientific EffectPhotochemical reaction: Photopolymerisation

Implementation Method 2

employing a low temperature crystallization process to convert the amorphous silicon layer into a polysilicon layer

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS10101620B2Manufacture method of low temperature poly-silicon array substrate
Publication Date: 2018.10.16 WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
  • US10101620B2 patent drawing
  • US10101620B2 patent drawing
  • US10101620B2 patent drawing

AI summary

The present invention provides a manufacture method of a Low Temperature Poly-silicon array substrate. A halftone mask is utilized to realize the pattern process to the polysilicon layer and the N type heavy doping process of the polysilicon section of the NMOS region. In comparison with prior art, one mask is eliminated, and thus, the production cost is reduced, and the manufactured Low Temperature Poly-silicon array substrate possesses fine electronic property.