Selective Deposition Using Halide Precursors for FinFET Contact Layers

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Solution Overview

Problem

Existing methods for forming n-type doped layers in FinFET transistors face challenges in achieving optimal growth rate, selectivity, and dopant concentration, particularly when growing on substitutional lattice sites, often requiring adjustments that compromise either growth rate or dopant incorporation.

Innovation Solution

A method involving a sequence of steps including precleaning, temperature stabilization, and flowing halide, silicon, and dopant precursors in a controlled manner within a reaction chamber to form a contact layer with high n-type dopant incorporation, using precursors like hydrogen chloride, silane, and phosphoric halides, which allows selective deposition on Fin structures without inhibiting growth rate or dopant levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a particular chemistry flow or reduced process temperature is used to achieve selectivity for the doped layer, then selectivity is improved, but growth rate and dopant incorporation are adversely affected

Engineering Contradiction:
ImproveselectivityVSAvoidgrowth rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the chemical parameters by introducing specific halide precursors (AsCl3, AsH3, PH3) that enable selective deposition through chemical affinity differences. This allows maintaining higher process temperatures and flow rates that promote both growth rate and dopant incorporation while achieving selectivity through the unique reactivity of halide precursors with silicon surfaces versus dielectric surfaces.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If a particular chemistry flow or reduced process temperature is used to achieve selectivity for the doped layer, then selectivity is improved, but dopant incorporation is adversely affected

Engineering Contradiction:
ImproveselectivityVSAvoiddopant concentration
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent introduces halide-based dopant precursors (AsCl3, AsH3, PH3) that fundamentally change the deposition chemistry. These precursors enable selective reaction on silicon surfaces while maintaining conditions favorable for high dopant incorporation. The halide chemistry allows dopant introduction at lower temperatures that would otherwise reduce dopant concentration, thus resolving the contradiction between selectivity and dopant incorporation.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If growth conditions are optimized for high growth rate, then productivity is improved, but selectivity and geometry control are compromised

Engineering Contradiction:
Improvegrowth rateVSAvoidselectivity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent employs halide precursors that provide inherent selectivity through chemical affinity, allowing the use of higher temperatures and flow rates that drive fast growth. The halide chemistry reacts selectively with silicon surfaces to form silicon halide intermediates that decompose to deposit silicon, while dielectric surfaces remain unaffected. This chemical selectivity mechanism enables high growth rates without sacrificing selectivity or geometry control.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the formation of a contact layer with high phosphorous content and electrically active characteristics, achieving desired thickness and dopant levels while maintaining a safe and efficient process.

Implementation Method 1

flowing a halide precursor onto the device, the halide precursor prevents deposition onto a dielectric layer disposed on the semiconductor substrate

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

flowing a silicon precursor onto the device, and flowing a dopant precursor onto the device, wherein the silicon precursor and the dopant precursor react to form a contact layer

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Data Source

PatentUS20230145240A1Methods for selective deposition utilizing n-type dopants and/or alternative dopants to achieve high dopant incorporation
Publication Date: 2023.05.11 ASM IP HLDG BV
  • US20230145240A1 patent drawing
  • US20230145240A1 patent drawing
  • US20230145240A1 patent drawing

AI summary

A method for forming a doped layer is disclosed. The doped layer may be used in a NMOS or a silicon germanium application. The doped layer may be created using an n-type halide species in a n-type dopant application, for example.