Vertical Hall Sensor Offset Reduction via Conductive Buffer Regions
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Solution Overview
Problem
Vertical Hall sensors suffer from high offset voltage errors due to lack of electrical symmetry, which limits their accuracy in measuring magnetic fields, and existing solutions fail to effectively reduce these errors across varying temperature and biasing conditions.
Innovation Solution
The introduction of highly conductive buffer regions between well contacts in a semiconductor chip, which provide zones of equal potential and increase electrical symmetry, allowing for reduced offset errors through the spinning current method, regardless of temperature and biasing conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the spinning current technique is applied to reduce offset voltage, then the measurement accuracy is improved, but the residual offset remains high due to lack of electrical symmetry in vertical Hall sensors
Solution Approach 1:
The patent intentionally introduces asymmetry in the form of buffer regions with different conductivity types (n-type and p-type) alternating between the well contacts. This controlled asymmetry compensates for the inherent asymmetry in the vertical Hall sensor structure, achieving overall electrical symmetry for improved offset cancellation.
Solution Approach 2:
Buffer regions are introduced as intermediary structures between the well contacts. These buffer regions mediate the electrical interaction between adjacent well contacts, providing a transition zone that balances the electrical potential and improves the effectiveness of the spinning current technique.
2Ease of manufacture
If conventional vertical Hall sensor structure is used, then manufacturing is simplified using CMOS technology, but offset voltage error is high due to limited well depth and contact arrangement
Solution Approach 1:
The patent applies local quality by creating alternating n-type and p-type buffer regions at specific locations between the well contacts. This localized modification of conductivity type in specific regions improves the electrical symmetry without changing the overall vertical Hall sensor structure or requiring non-CMOS compatible processes.
Solution Approach 2:
The patent changes the electrical parameter (conductivity type) in the buffer regions between well contacts. By alternating between n-type and p-type conductivity in adjacent buffer regions, the patent creates a balanced electrical environment that reduces offset voltage while maintaining compatibility with standard CMOS manufacturing processes.
3Measurement precision
If additional resistance is added to balance the Wheatstone bridge, then offset is reduced to zero at fixed conditions, but the matching is disturbed by temperature and biasing voltage variations
Solution Approach 1:
The patent creates equipotential conditions by introducing buffer regions that balance the electrical potential between adjacent well contacts. The alternating n-type and p-type buffer regions ensure that the electrical environment is symmetric, making the sensor less sensitive to temperature and biasing voltage variations.
Solution Approach 2:
The patent introduces dynamic adaptability through alternating conductivity type buffer regions that can respond to changing temperature and biasing conditions. This dynamic structure maintains electrical symmetry across varying operating conditions, unlike fixed resistance values that are sensitive to environmental changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buffer regions reduce offset errors by a factor of 20 to 100, maintaining symmetry and accuracy across multiple operation conditions, improving the sensitivity and reproducibility of magnetic field measurements.
Implementation Method 1
an electrically conductive well having a first conductivity type, in a substrate having a second conductivity type, at least four well contacts arranged at the surface of the well, and having the first conductivity type, a plurality of buffer regions interleaved with the well contacts, and having the first conductivity type
Implementation Method 2
Vertical Hall sensors have the advantage that they can be manufactured using conventional semiconductor technology
Data Source
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AI summary
A semiconductor chip (10) for measuring a magnetic field based on the Hall effect. The semiconductor chip (10) comprises an electrically conductive well (12) having a first conductivity type, in a substrate (13) having a second conductivity type. The semiconductor chip (10) comprises at least four well contacts (14) arranged at the surface of the well (12), and having the first conductivity type. The semiconductor chip (10) comprises a plurality of buffer regions (19) interleaved with the well contacts (14) and having the first conductivity type. The buffer regions (19) are highly conductive and the buffer region (19) dimensions are such that at least part of the current from a well contact (14) transits through one of its neighboring buffer regions (19).