Face-Down Hall Sensor Package with TSVs for Compact Isolation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Hall sensors face challenges in minimizing package size due to the long distance between the sensing area on the silicon die and the leadframe, necessitating high isolation that is difficult to achieve with current manufacturing techniques.
Innovation Solution
A semiconductor package design featuring a face-down configuration with through substrate vias (TSVs) and a leadframe structure, including a redistribution layer (RDL) and an insulator to provide high isolation and minimize package size, while allowing for efficient current flow and magnetic field detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional Hall sensor package structure is used with insulation layer and die attach material between leadframe and die, then isolation between sensing area and leadframe is achieved, but package size increases due to long distance required for isolation
Solution Approach 1:
The patent transitions from planar isolation to three-dimensional isolation by positioning the insulator laterally adjacent to the sensing area rather than directly beneath it. This lateral positioning in the horizontal plane allows isolation without increasing the vertical distance between leadframe and die, thereby reducing package size while maintaining isolation effectiveness.
Solution Approach 2:
The patent introduces a laterally positioned insulator as an intermediary element that provides isolation between the sensing area and leadframe current. This insulator acts as a mediator that blocks magnetic field interference without requiring the sensing area to be positioned far from the leadframe, thus achieving both isolation and compact packaging.
2Volume of stationary object
If the sensing area is positioned close to the leadframe to minimize package size, then package size is reduced, but isolation between sensing area and leadframe becomes insufficient
Solution Approach 1:
The patent resolves this contradiction by moving the insulator from a vertical isolation approach to a lateral isolation approach. The insulator is positioned in the horizontal plane adjacent to the sensing area, providing isolation without requiring increased vertical spacing. This dimensional change allows compact packaging while maintaining reliable isolation.
Solution Approach 2:
The patent applies local quality by positioning the insulator specifically adjacent to the sensing area where isolation is most critical. This localized placement provides targeted isolation exactly where needed, allowing the sensing area to be positioned close to the leadframe overall while maintaining sufficient isolation at the critical interface.
3Productivity
If through substrate vias are used to connect bond pads to contacts on the die, then electrical connection efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the electrical connection path into distinct components: bond pads on the die surface, through substrate vias penetrating the die thickness, and contacts on the opposite surface. This segmentation allows each component to be optimized independently and facilitates modular manufacturing processes, reducing overall complexity despite the multi-step via formation.
Solution Approach 2:
The patent transitions from two-dimensional planar connections to three-dimensional vertical connections through the substrate. The through substrate vias provide direct vertical pathways for electrical connection, eliminating the need for long lateral traces and reducing signal path length. This dimensional change improves connection efficiency while the via structure itself simplifies the interconnection architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves a compact package size with enhanced sensing capability and improved isolation, enabling efficient magnetic field detection and reduced mechanical stress through the use of TSVs and a stress-relief cavity.
Implementation Method 1
The 'Hall effect' occurs when a magnetic field is oriented perpendicular to an electric current. The magnetic field generates a voltage difference across a conductor, called the Hall voltage, in a direction which is perpendicular to both the direction of the magnetic field and the direction of the current flow. By measuring the Hall voltage, it is possible to determine the magnitude of the magnetic field.
Data Source
AI summary
An integrated circuit (IC) package comprises a semiconductor die having a first surface with a Hall-effect sensor circuit and a second surface. A plurality of through substrate vias (TSV) each having a metal layer extend from the first surface of the semiconductor die to the second surface. The IC package includes a portion of a leadframe having a first set of leads and a second set of leads. The first set of leads provide a field generating current path for directing a magnetic field toward the Hall-effect sensor circuit. The second set of leads are attached to bond pads on the semiconductor die. A first side of an insulator is attached to the leadframe using a die attach material, and a second side of the insulator is attached to the first side of the semiconductor die using a bonding material.