Thin Hall Plate Sensor Sensitivity via SOI Substrate
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Solution Overview
Problem
Conventional Hall sensor devices have limited sensitivity due to the requirement for thick Hall plate structures, which reduces their effectiveness in sensing magnetic fields.
Innovation Solution
A Hall effect sensor is formed with a thin Hall plate and optional front and back gates, and reduced or omitted doping to enhance sensitivity, using a silicon-on-insulator (SOI) substrate with shallow trench isolation (STI) structures and N+ dopant ion implantation to create N+ implantation regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thick Hall plate structure is used in conventional Hall sensors, then the depletion layer can be properly controlled with P+ doping, but the sensitivity of the sensor is reduced
Solution Approach 1:
The patent transitions from a conventional thick Hall plate structure to a thin-film Hall plate structure formed on an SOI substrate. This dimensional change allows the Hall plate thickness to be reduced to approximately 100-500 nm, enabling high sensitivity while maintaining proper depletion layer control through the unique SOI architecture with buried oxide layer and selective doping regions.
Solution Approach 2:
The patent changes the fundamental parameter of Hall plate thickness from micrometer-scale (conventional) to nanometer-scale (thin-film). This parameter change, combined with modified doping concentrations and the introduction of front and back gates, enables simultaneous achievement of high sensitivity and reliable depletion layer control that were contradictory in conventional designs.
2Measurement precision
If the Hall plate is made thin to enhance sensitivity, then sensitivity improves, but the fabrication process becomes more complex
Solution Approach 1:
The patent merges the Hall plate fabrication with the existing CMOS front-end circuit fabrication process. The thin-film Hall plate is formed using the same SOI substrate and doping techniques already employed for the CMOS devices, eliminating the need for separate Hall plate fabrication steps and reducing overall process complexity despite the thin-film requirement.
Solution Approach 2:
The SOI substrate and associated fabrication processes serve multiple functions: they provide the CMOS front-end circuit fabrication, form the thin-film Hall plate structure, enable proper depletion layer control, and achieve high sensitivity. This multi-functionality reduces the need for additional specialized process steps.
3Reliability
If additional doping layers are added to control depletion, then depletion control improves, but the number of fabrication steps and masks increases
Solution Approach 1:
The patent combines the formation of P+ doping regions for depletion layer control with the source and drain region formation of the CMOS transistors. The same ion implantation steps and photolithography masks used for CMOS device fabrication are utilized to create the P+ doped regions in the Hall plate, eliminating the need for additional doping steps and masks.
Solution Approach 2:
The P+ doping regions serve dual purposes: they form the source and drain regions of the CMOS transistors and simultaneously create the depletion layer control structures for the Hall plate. This multi-functionality achieves proper depletion control without requiring separate fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a Hall sensor device with improved sensitivity and a simpler fabrication process, suitable for various industrial applications including microprocessors and digital cameras, without the need for additional masks.
Implementation Method 1
A Hall effect sensor is a transducer that varies its output voltage in response to a magnetic field. Hall sensor devices can sense a magnetic field perpendicular to a chip in which a Hall plate of the Hall effect sensor is formed.
Implementation Method 2
implanting N+ dopant ions into each end of the cross-shaped Si layer to form N+ implantation regions
Data Source
AI summary
Methods of forming a high sensitivity Hall effect sensor having a thin Hall plate and the resulting devices are provided. Embodiments include providing a SOI substrate having a sequentially formed Si substrate and BOX and Si layers; forming a first STI structure in a first portion of the Si layer above the BOX layer, the first STI structure having a cross-shaped pattern; forming a second STI structure in a frame-shaped pattern in a second portion of the Si layer; the second STI structure formed outside and adjacent to the first STI structure; removing a portion of the Si layer between the first and second STI structures down to the BOX layer; removing the first STI structure, a cross-shaped Si layer remaining; and implanting N+ dopant ions into each end of the cross-shaped Si layer to form N+ implantation regions.