Handle Wafer Oxide Barrier for SOI Flatness Control
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Solution Overview
Problem
Existing methods for depositing a charge trapping layer on high resistivity handle wafers in semiconductor-on-insulator structures result in unacceptable flatness, which affects processing precision and causes issues during lithography and wafer handling, leading to yield loss.
Innovation Solution
A semiconductor oxide layer is formed on the back surface of the handle wafer to prevent deposition of the charge trapping layer on the back surface, ensuring the handle wafer maintains acceptable flatness by limiting the deposition to the front surface, and the oxide layer is thick enough to withstand deposition temperatures without peeling off.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a charge trapping layer is deposited on the front surface of a high resistivity handle wafer, then the performance of RF devices is improved by trapping charges at the interface, but the flatness of the handle wafer deteriorates due to deposition on the back surface
Solution Approach 1:
The patent divides the wafer surface into two distinct regions: the front surface where charge trapping layer deposition is desired, and the back surface where deposition must be prevented. By applying the oxide layer selectively to the back surface, the patent segments the deposition process to occur only in the required region, thereby improving device performance without compromising wafer flatness.
Solution Approach 2:
The patent introduces an oxide layer as an intermediary substance on the back surface of the handle wafer. This oxide layer acts as a barrier that prevents the charge trapping layer material from depositing on the back surface during the deposition process. The oxide layer serves as a mediator that allows the deposition process to proceed on the front surface while blocking it on the back surface, thus resolving the flatness issue.
2Manufacturing precision
If an oxide layer is formed on the back surface to prevent charge trapping layer deposition, then wafer flatness is maintained, but the process complexity increases due to additional deposition and removal steps
Solution Approach 1:
The patent applies the oxide layer to the back surface before the charge trapping layer deposition process. This preliminary action prepares the back surface in advance to resist unwanted deposition. By performing this preparation step beforehand, the patent ensures that the main deposition process can proceed without interruption or complications, and the oxide layer is subsequently removed only after it has served its protective function.
Solution Approach 2:
The patent applies the oxide layer only to the back surface of the handle wafer, not to the entire wafer or the front surface. This localized application of the oxide layer provides the necessary protection precisely where needed while leaving the front surface available for charge trapping layer deposition. The selective, local nature of this treatment minimizes the impact on overall process complexity.
3Stability of the object's composition
If the oxide layer thickness is increased to withstand deposition temperatures, then the oxide layer remains intact during deposition, but material usage and processing time increase
Solution Approach 1:
The patent optimizes the thickness parameter of the oxide layer to find the minimum value that still provides sufficient protection during the deposition process. Rather than using a uniformly thick oxide layer, the patent carefully controls the thickness parameter to be just enough to withstand the deposition temperatures and prevent material penetration, thereby minimizing material usage and associated processing time while maintaining oxide layer integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method consistently achieves handle wafer flatness within desired parameters, improving processing precision and reducing yield loss by maintaining the integrity of the handle structure during charge trapping layer formation.
Implementation Method 1
depositing a semiconductor material on the front surface
Implementation Method 2
depositing a semiconductor material on the front surface
Implementation Method 3
the oxide layer is thick enough to withstand deposition temperatures without peeling off
Data Source
AI summary
Methods of preparing handle structures for use in semiconductor-on-insulator structures, and methods of preparing semiconductor-on-insulator structures, include forming a charge trapping layer on a front surface of a single crystal semiconductor handle substrate by depositing a semiconductor material on the front surface, where a semiconductor oxide layer is formed on the back surface and where, during deposition of the semiconductor material on the front surface, the semiconductor oxide layer limits deposition of the semiconductor material on the back surface. The semiconductor oxide layer has a sufficient thickness to withstand the deposition of the semiconductor material without exposing the back surface.