Handling Layer for Semiconductor Die Separation
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Solution Overview
Problem
The challenge in semiconductor fabrication lies in efficiently separating multiple semiconductor dies from a wafer substrate without damaging the delicate devices, as existing methods like mechanical sawing or laser separation can be inefficient and prone to handling errors.
Innovation Solution
A method involving the formation of semiconductor layers with defined streets, deposition of metal and handling layers, and strategic use of stop electroplating areas to control metal deposition, allowing for selective removal of layers and substrate exposure for adhesive application, enabling precise separation and handling of semiconductor dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If mechanical sawing or laser separation is used to separate semiconductor dies, then separation can be achieved, but the process is inefficient and prone to handling errors
Solution Approach 1:
The patent applies preliminary action by forming handling layers and defining streets during the semiconductor fabrication process itself, before separation occurs. The handling layers are deposited and patterned alongside the semiconductor devices, creating built-in handling features that enable efficient and reliable separation without requiring external mechanical intervention at the separation stage.
Solution Approach 2:
The patent introduces handling layers as intermediary structures between the semiconductor devices and the separation process. These handling layers act as mediators that facilitate die separation by providing a controlled interface for mechanical handling, reducing direct contact with fragile device regions and minimizing handling errors.
2Reliability
If thick metal layers are present during die separation, then electrical connectivity is maintained, but cutting through the metal layers increases process complexity and time
Solution Approach 1:
The patent applies local quality by creating stop electroplating areas with different properties than the surrounding regions. These stop EP areas have controlled metal deposition characteristics that allow selective metal layer formation - maintaining electrical connectivity where needed while creating natural separation planes where not needed, thereby reducing the amount of metal that must be cut through during separation.
Solution Approach 2:
The patent segments the metal layer structure by using stop EP areas to create distinct regions with different metal thicknesses or compositions. This segmentation allows the separation process to target only specific metal regions rather than cutting through uniformly thick metal layers across the entire wafer, reducing separation time and complexity.
3Ease of operation
If the substrate is removed early to expose semiconductor layers, then handling becomes easier, but the semiconductor layers lack support during subsequent processing
Solution Approach 1:
The patent uses handling layers as intermediary support structures that remain attached to the semiconductor devices during substrate removal and subsequent processing. These handling layers provide the necessary mechanical strength and structural support after substrate removal, enabling easy handling without compromising the integrity of the delicate semiconductor layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method allows for efficient separation and handling of semiconductor dies, optimizing the thickness for packaging and handling while minimizing the need to cut through thick metal layers, thus enhancing the precision and reliability of the semiconductor separation process.
Implementation Method 1
forming stop electroplating (EP) areas in the streets; depositing one or more metal layers above the connected conductor layers, wherein the stop EP areas discourage metal deposition in at least portions of the streets
Data Source
AI summary
A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.