Hard Error Tracker Dynamic Reordering for SSD Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems fail to effectively track and manage hard errors in SSDs, leading to reliability degradation and increased read latency due to reliance on fail bit counts alone, which do not account for the impact of hard error percentages on data retrieval.
Innovation Solution
A memory system with a hard error tracker module that dynamically reorders historical read retry entries based on page type and hard error percentages, using a hardware-based tracker to monitor fail bit counts and a programmed module to determine hard error percentages, ensuring that pages with lower error rates are prioritized for subsequent reads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fail bit counts alone are used to manage hard errors, then the system structure remains simple, but reliability deteriorates due to inability to account for hard error percentages
Solution Approach 1:
The error tracking system is segmented into distinct functional modules: a hard error tracker module for monitoring fail bit counts, a hard error percentage module for calculating error percentages, and an HRR management module for dynamically reordering historical read retry entries. This segmentation allows each module to perform its specific function independently, improving overall reliability while maintaining manageable complexity through modular design.
Solution Approach 2:
The hard error percentage module acts as an intermediary between the raw fail bit count data from the tracker and the HRR management decisions. It processes the raw data to generate meaningful hard error percentages that inform the reordering of HRR entries, serving as a bridge that transforms basic error counting into actionable reliability management.
2Loss of time
If traditional error tracking without dynamic HRR reordering is used, then device complexity is low, but read latency increases due to inability to prioritize low-error pages
Solution Approach 1:
The system dynamically reorders historical read retry entries based on real-time hard error percentage calculations. Instead of using a static error tracking approach, the HRR entries are continuously repositioned according to current error rates, allowing the system to adapt to changing error conditions and prioritize reads from more reliable pages, thereby reducing read latency.
Solution Approach 2:
The system implements feedback loops where hard error percentages calculated from recent reads are fed back into the HRR management module. This feedback mechanism allows the system to continuously adjust the priority of HRR entries based on actual error performance, creating a closed-loop control system that optimizes read operations over time.
3Reliability
If all memory pages are treated equally without error-based prioritization, then system operation is simple, but quality of service deteriorates due to uniform treatment of high and low error pages
Solution Approach 1:
The system applies different quality levels of service to different memory pages based on their local error characteristics. Pages with lower hard error percentages receive higher priority in the HRR queue, while pages with higher error rates are deprioritized. This local quality differentiation ensures that resources are allocated based on actual page reliability rather than uniform treatment.
Solution Approach 2:
The system changes the priority parameter of each HRR entry based on calculated hard error percentages. Instead of maintaining equal priority for all pages, the priority parameter is dynamically adjusted according to error rate measurements, allowing the system to differentiate service quality based on actual page conditions.
Data Source
AI summary
A memory system for detecting hard errors. The memory system has a first memory block and a second memory block and a memory controller in communication with the first memory block, The memory controller includes a hard error tracker module comprising hardware configured to track over time fail bit counts from data read from the first memory block and includes a hard error percentage module programmed to determine, based on the fail bit counts, hard error percentages for the data read from the first memory block. The hard error percentage module is programmed to dynamically reorder historical read retry (HRR) entries for subsequent data reads, based on a page type of the data being read and the hard error percentages determined during reading of data from the memory block.