Hard-Input FEC Receiver With Bit-Weighted LLR Demapping
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Solution Overview
Problem
Digital receivers face challenges in efficiently recovering FEC-encoded data without requiring complex modifications to the symbol demapping process or subsequent decoding, particularly in multi-rate PON systems that use modulation formats like PAM4 and PAM3, which demand advanced processing and high-speed interfaces.
Innovation Solution
A digital receiver is designed with a one-dimensional hard-input demapper and an LLR generator that assigns specific LLR magnitudes based on the probability of error in demapped bits, improving performance with minimal increase in component complexity, applicable to various communication channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If soft-input LDPC decoding with ADC is used to achieve optimal performance, then decoding accuracy is improved, but receiver complexity and interface bandwidth requirements increase significantly
Solution Approach 1:
The patent replaces expensive, complex soft-input decoding with ADC and high-speed interfaces with a simpler hard-input demapper followed by LLR magnitude assignment. The solution uses basic digital logic and lookup tables instead of high-resolution ADCs, achieving acceptable performance with much lower complexity and cost.
Solution Approach 2:
The patent changes the parameter of LLR magnitude from fixed to variable based on demapped bit position. By assigning different magnitudes to different bit positions (e.g., MSB vs. LSB in PAM4), the system achieves better decoding performance without requiring soft-input processing, effectively trading parameter flexibility for complexity reduction.
2Device complexity
If hard-input demapping is used to reduce complexity, then receiver simplicity is improved, but decoding performance deteriorates due to loss of reliability information
Solution Approach 1:
The patent applies local quality by assigning different LLR magnitudes to different bit positions based on their individual reliability characteristics. For example, in PAM4 modulation, the MSB and LSB have different error probabilities, so they are assigned different magnitudes. This localized differentiation restores some reliability information without requiring full soft-input processing.
Solution Approach 2:
The patent adds a new dimension to hard-input demapping by introducing variable LLR magnitudes as a second layer of processing. Instead of simply mapping symbols to bits, the system now maps symbols to bits with associated reliability weights, effectively adding a magnitude dimension to the traditional hard-input approach.
3Measurement precision
If variable LLR magnitudes are assigned based on demapped bit position, then decoding accuracy is improved, but processing complexity increases slightly
Solution Approach 1:
The patent performs preliminary action by pre-calculating and storing LLR magnitudes in lookup tables based on demapped bit position and modulation scheme. During operation, the system simply retrieves pre-computed magnitude values rather than calculating them in real-time, minimizing processing complexity while maintaining accuracy improvements.
Solution Approach 2:
The patent introduces an intermediary LLR magnitude assignment stage between hard-input demapping and LDPC decoding. This intermediary layer translates simple demapped bits into reliability-weighted LLRs using lookup tables, bridging the gap between simple hard-input processing and complex soft-input requirements with minimal added complexity.
4Adaptability or versatility
If multi-rate PON systems support multiple modulation formats, then system versatility is improved, but receiver complexity increases to handle different demapping requirements
Solution Approach 1:
The patent achieves universality by designing a single receiver architecture that handles multiple modulation formats (PAM2, PAM3, PAM4, etc.) through a unified process: hard-input demapper followed by LLR magnitude assignment. The system uses lookup tables configured for different modulation schemes, allowing one receiver to perform multiple functions without requiring format-specific processing paths.
Data Source
AI summary
A digital receiver based on one-dimensional hard demapping of an input symbol stream (FEC encoded) is configured to utilize LLRs created to have bit-specific magnitude values to improve the probability that the included decoder (such as an LDPC decoder) properly recovers each bit from the original stream. The digital receiver may be used with various types of data modulation schemes (e.g., PAM3, PAM4, DSQ8, etc.), with a specific set of LLR magnitudes created for each modulation scheme.