Shielded Hard Macro Bus Authentication for Secure SoC Integration
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Solution Overview
Problem
The integration of hard macros in System-on-Chip (SOC) circuits is complex and time-consuming, leading to prolonged design-to-production cycles due to the need for customizing microcontrollers to host these macros, and existing security measures are vulnerable to malicious attacks.
Innovation Solution
Implementing a secure and independent bus system using standard interfaces like SPI, I2C, and USART to manage hard macros as external peripherals, coupled with a shielded bus and detection mechanisms to prevent unauthorized access and malicious activities, ensuring secure communication and authentication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If hard macros are integrated into SOC circuits using traditional methods, then communication security can be maintained through Trust Zone or Resource Isolation Framework, but the design-to-production time is prolonged and device complexity increases
Solution Approach 1:
The system segments hard macros into isolated compartments with unique CID identifiers, separating them from the main microcontroller internal buses. Each hard macro operates in its own security domain, accessible only through controlled I/O pins and dedicated secure interfaces, thus reducing integration complexity and acceleration design-to-production time while maintaining security through spatial separation.
Solution Approach 2:
A secure bus interface acts as an intermediary between the microcontroller and hard macros, mediating all communications through controlled protocols. This intermediary layer enforces security policies, manages CID-based access control, and prevents direct access to internal resources, thereby maintaining security without requiring deep customization of the microcontroller architecture.
2Reliability
If Trust Zone or Resource Isolation Framework is used to secure hard macros, then communication security is maintained, but the microcontroller must be customized leading to high complexity
Solution Approach 1:
The secure bus interface implements a universal communication protocol that can interface with multiple types of hard macros (UWB, BLE, Wi-Fi, etc.) without requiring custom microcontroller configurations. The CID-based compartmentalization system provides a generic security framework that works across different hard macro types, eliminating the need for specialized customization while maintaining robust security.
Solution Approach 2:
Instead of customizing the microcontroller for each hard macro type, the system uses standardized copies of secure interface modules and CID management logic. These reusable security templates can be instantiated multiple times with different CID assignments, providing consistent security enforcement without replication of custom microcontroller designs.
3Reliability
If hard macros are coupled to internal buses using existing security measures, then communication can be secured, but unauthorized access and malicious attacks remain vulnerable
Solution Approach 1:
The system implements preliminary security measures by establishing CID-based access control boundaries before any communication occurs. Hard macros are pre-configured with unique CIDs that restrict their access to specific resource sets, preventing potential attackers from accessing unauthorized internal buses or resources. This preemptive compartmentalization neutralizes many attack vectors before they can be exploited.
Solution Approach 2:
Security credentials and CID assignments are established in advance during device initialization or manufacturing. The secure bus interface pre-configures access control policies and authentication mechanisms before hard macros become operational, ensuring that security protections are already in place to detect and prevent malicious activities rather than reacting to them after compromise.
Data Source
AI summary
A circuit implemented as a System-on-Chip (SOC) circuit comprising a microcontroller configured to drive one or more hard macros via a respective communication interface and a shielded bus. The microcontroller is configured to transmit random numbers over the shielded bus to the hard macro. The microcontroller and the hard macro are configured to use these random numbers as a cryptographic shared secret for authentication. The microcontroller is configured to drive via the communication interface, and the hard macros are authenticated via the random numbers.


