Hard Mask CD Shrink for Sub-EUV Semiconductor Patterning
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Solution Overview
Problem
Current semiconductor device fabrication techniques face challenges in achieving high transistor densities due to the high cost and limited availability of extreme ultraviolet (EUV) lithography tools, which are necessary for forming structures with small critical dimensions.
Innovation Solution
A method involving the sequential formation and chemical modification of hard masks on a substrate, using polysilicon and oxide layers, to reduce feature sizes below the minimum lithographic capability of available lithography tools, allowing for the creation of semiconductor structures with smaller critical dimensions without relying on state-of-the-art EUV lithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If EUV lithography is used to form structures with small critical dimensions, then manufacturing precision is improved, but device complexity and production cost increase
Solution Approach 1:
The patent segments the single lithography step into multiple sequential lithography steps followed by chemical modification steps. Instead of using one advanced EUV lithography tool to directly create the final small critical dimension, the process divides the pattern formation into stages: first lithography creates initial patterns, then chemical modification (such as oxidation) reduces the critical dimension further, and subsequent lithography steps refine the pattern. This segmentation allows using less complex lithography tools while achieving the precision that would otherwise require advanced EUV tools.
Solution Approach 2:
The patent applies preliminary chemical modification to the lithographically formed patterns before final pattern transfer. Specifically, oxide layers are grown on the lithographically formed structures to reduce their critical dimension, and sacrificial layers are deposited and patterned in advance to enable subsequent selective removal and pattern refinement. This preliminary action allows the lithography tool to work at relaxed dimensions while the chemical processes achieve the final small critical dimensions.
2Manufacturing precision
If EUV lithography tools are used to achieve high transistor density, then manufacturing precision is improved, but ease of manufacture deteriorates due to limited availability and high cost
Solution Approach 1:
The patent segments the critical dimension reduction task across multiple process steps using standard lithography tools rather than relying on a single advanced EUV tool. By dividing the pattern formation into sequential lithography and chemical modification steps, the process can be executed using widely available standard lithography equipment, dramatically improving ease of manufacture and production accessibility while still achieving the required small critical dimensions for high transistor density.
Solution Approach 2:
The patent changes the physical and chemical parameters of the patterned structures through controlled oxidation and other chemical modifications. The critical dimension is reduced not by improving lithography resolution but by changing the material properties and dimensions through chemical reactions (e.g., oxide growth that consumes silicon). This parameter change approach allows standard lithography tools to produce patterns that effectively have smaller critical dimensions after chemical processing, making the process accessible without EUV tools.
3Ease of manufacture
If standard lithography tools are used instead of EUV, then ease of manufacture is improved, but manufacturing precision deteriorates
Solution Approach 1:
The patent introduces chemical modification processes as intermediary steps between lithography and final pattern transfer. The lithography tool creates initial patterns with larger critical dimensions, then chemical intermediaries (oxide layers, sacrificial materials) are used to transform these patterns into final structures with smaller critical dimensions. This intermediary approach allows standard lithography tools to achieve precision levels that would normally require advanced EUV tools, bridging the gap between ease of manufacture and manufacturing precision.
Solution Approach 2:
The patent replaces the mechanical/optical limitation of lithography resolution with chemical processes for critical dimension control. Instead of relying on the numerical aperture and wavelength limits of lithography optics, the process uses chemical reactions (oxidation, etching, deposition) to precisely control the final critical dimensions. This substitution of chemical mechanisms for optical-mechanical limitations enables standard lithography tools to achieve precision comparable to or better than EUV tools for certain structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the manufacturing of semiconductor structures with critical dimensions smaller than those achievable by standard lithography tools, reducing production costs and overcoming the scarcity of advanced lithography tools, while maintaining high transistor density.
Implementation Method 1
forming a second hard mask of a second material on the substrate by chemically modifying the first hard mask
Implementation Method 2
forming a fourth hard mask of the second material on the substrate by chemically modifying the third hard mask
Data Source
AI summary
A technique for forming semiconductor structures having a critical dimension (CD) smaller than the minimum lithographic CD capability of an available lithography tool used to form structures on a substrate forms structures having that minimum lithographic CD and reduces the CD of those structures using non-lithographic techniques. A method for manufacturing an integrated circuit includes forming a first hard mask on a substrate by patterning a first layer of a first material. The method includes forming a second hard mask of a second material on the substrate by chemically modifying the first hard mask. The method includes forming a third hard mask by patterning a second layer of the first material on the substrate. The method includes forming a fourth hard mask of the second material on the substrate by chemically modifying the third hard mask.