Polysilicon Hard Mask Removal Using CMP Planarization
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Solution Overview
Problem
The semiconductor industry faces challenges in efficiently removing hard masks from polysilicon layers in integrated circuit fabrication, particularly due to varying etch rates and topographical features caused by different pattern densities in isolated and dense regions, which can lead to uneven removal and surface planarity issues.
Innovation Solution
A method involving chemical mechanical polishing (CMP) and flowable chemical vapor deposition (FCVD) is used to deposit a dielectric layer, which is then planarized to remove the hard mask and dielectric layer uniformly across different regions, ensuring a planar surface without the need for photolithography or selective etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to remove hard masks, then the hard mask can be removed, but varying etch rates occur between isolated and dense regions causing uneven removal and surface planarity issues
Solution Approach 1:
The patent replaces the chemical etching process with a mechanical-polishing process (CMP). Instead of using chemistry to remove the hard mask, a polishing head mechanically abrades the surface with a slurry, providing uniform material removal across isolated and dense regions regardless of pattern density, thereby achieving both high productivity and manufacturing precision
Solution Approach 2:
The patent changes the removal mechanism from chemical reaction-based etching to mechanical abrasion-based polishing. This parameter change eliminates the loading effect that causes etch rate variations, as mechanical polishing removes material at a consistent rate across different pattern densities, simultaneously improving surface planarity and etch rate uniformity
2Manufacturing precision
If photolithography or selective etching processes are used, then hard mask removal can be achieved, but process complexity increases
Solution Approach 1:
The patent makes the CMP process universal by using it for both dielectric layer planarization and hard mask removal in a single integrated step. The polishing head and slurry system perform multiple functions sequentially, eliminating the need for separate photolithography and selective etching processes, thereby reducing device complexity while maintaining hard mask removal uniformity
Solution Approach 2:
The patent merges the dielectric layer planarization and hard mask removal into a single CMP process step. Instead of performing these operations separately with different process conditions, the combined process uses one polishing head configuration and slurry system to accomplish both tasks, simplifying the overall fabrication process while ensuring uniform hard mask removal
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the effective removal of hard masks without varying etch rates between isolated and dense regions, maintaining a planar structure and reducing loading effects, thus enhancing the precision and efficiency of integrated circuit fabrication.
Implementation Method 1
A first portion of the dielectric layer is planarized by chemical mechanical polishing (CMP) to remove a topography of the dielectric layer. The hard mask and a second portion of the dielectric layer are removed by the CMP.
Implementation Method 2
A dielectric layer is deposited on the substrate and on the patterned gate stacks using a flowable chemical vapor deposition (FCVD) process
Data Source
AI summary
A method of removing a hard mask is provided. Gate stacks are patterned on a substrate, where the gate stacks include a polysilicon layer and the hard mask deposited over the polysilicon layer. A dielectric layer is deposited on the substrate and on the patterned gate stacks. A first portion of the dielectric layer is planarized by chemical mechanical polishing (CMP) to remove a topography of the dielectric layer. The hard mask and a second portion of the dielectric layer are removed by the CMP.