Hard Mask Layer Etching for Semiconductor Depth Uniformity
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Solution Overview
Problem
In semiconductor fabrication, multiple exposure lithography processes lead to etching depth variations and uniformity issues due to different treatment conditions across regions, affecting subsequent processes and device performance.
Innovation Solution
A hard mask layer is formed on the material layer with the same material as the dielectric layer, patterned, and used as a mask for etching, followed by specific etching processes to improve depth uniformity and simplify the process by removing the hard mask layer during the dielectric layer etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If multiple exposure lithography processes are used to achieve miniaturized semiconductor device structures, then the device size is reduced, but etching depth variations and uniformity issues occur
Solution Approach 1:
A hard mask layer is formed on the material layer before performing multiple patterning photolithography processes. This preliminary action creates a protective layer that ensures uniform etching depth across different regions, even when multiple exposure lithography processes are used to achieve miniaturized device structures.
Solution Approach 2:
The hard mask layer acts as an intermediary between the multiple exposure lithography processes and the material layer. It mediates the etching process to ensure uniform depth across regions that are treated differently by subsequent exposure lithography processes, preventing etching depth variations.
2Adaptability or versatility
If multiple exposure lithography processes are used to create complex patterns, then pattern complexity is increased, but process complexity and etching uniformity deteriorate
Solution Approach 1:
The hard mask layer is formed and patterned before the multiple exposure lithography processes begin. This preliminary patterning simplifies subsequent processes by providing a pre-defined mask structure that guides the multiple exposure steps, reducing overall process complexity while maintaining pattern complexity.
Solution Approach 2:
The patterning process is segmented into multiple steps: first forming and patterning the hard mask layer, then performing multiple exposure lithography processes. This segmentation allows each step to be optimized independently, managing process complexity while achieving complex patterns.
3Manufacturing precision
If a hard mask layer is formed and patterned before etching to improve etching depth uniformity, then etching uniformity is improved, but process complexity increases
Solution Approach 1:
The hard mask layer material is selected to be identical to the dielectric layer material. This merging of materials allows the hard mask layer to be removed using the same etching process that removes the dielectric layer, combining two removal steps into one and reducing overall process complexity.
Solution Approach 2:
The hard mask layer and dielectric layer are made homogeneous in material composition. This homogeneity ensures that a single etching process can effectively remove both layers, simplifying the fabrication process while maintaining the protective function of the hard mask layer during etching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures uniform etching depths across different regions, improving the consistency of semiconductor device fabrication and reducing process complexity by controlling etching variations and simplifying the process flow.
Implementation Method 1
photolithography has been an essential technique. The photolithography is configured to form designed patterns such as circuit layout patterns on one or more photomasks, and then to precisely transfer such patterns to a photoresist layer on a film by exposure and development steps
Implementation Method 2
a fourth etching process is performed to the dielectric layer and the hard mask layer after the third etching process for removing the hard mask layer and forming a trench in the dielectric layer
Data Source
AI summary
A method of forming a patterned structure is provided in the present invention. A hard mask layer is formed on a material layer before a first etching process and a second etching process for forming a first opening and a second opening partially overlapping with each other in the hard mask layer. The hard mask layer having the first opening and the second opening is then used in a third etching process performed to the material layer. A fourth etching process is performed to the hard mask layer and a dielectric layer disposed under the material layer after the third etching process. The material of the hard mask layer is identical to the material of the dielectric layer, and the fourth etching process may be used to remove the hard mask layer and form a trench in the dielectric layer accordingly.