Hard Mask Stack for Trench and Via Etching at Reduced Pitch
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Solution Overview
Problem
As integrated circuits are scaled down, features transferred to hard mask layers often break down during subsequent etching processes, leading to defects and low-quality features in the target layer.
Innovation Solution
A hard mask stack comprising two dielectric mask layers with high etch selectivity relative to each other, and a metal-containing mask layer between them, is used to pattern trench and via features in a semiconductor device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional single-layer hard mask is used for patterning, then the process is simple, but the features break down during etching leading to defects
Solution Approach 1:
The hard mask is divided into multiple layers (first hard mask layer, second hard mask layer, and third hard mask layer) with different materials and etch selectivities. Each layer serves a specific function in the etching process, preventing feature breakdown while maintaining pattern fidelity.
Solution Approach 2:
The patent uses a composite mask structure combining different materials (e.g., silicon oxide, silicon nitride, silicon oxynitride) with complementary properties. The combination provides both mechanical support and etch resistance, solving the breakdown issue while managing process complexity.
2Productivity
If pitch is reduced to increase integration density, then more components fit in given area, but feature breakdown increases during etching
Solution Approach 1:
The multi-layer mask structure segments the etching protection function across different layers, allowing each layer to be optimized for specific etching conditions. This enables precise pattern transfer at reduced pitches without feature breakdown.
Solution Approach 2:
The patent changes material parameters (etch selectivity, film thickness) of each mask layer to optimize the etching process for reduced pitch features. By adjusting these parameters, high-quality features are achieved at smaller dimensions.
Data Source
AI summary
Embodiments of the present disclosure relates to method of forming trench and via features using dielectric and metal mask layers. Particularly, embodiments of present disclosure provide a hard mask stack including a first dielectric mask layer, and second dielectric mask layer and a metal mask layer, wherein the first dielectric mask layer and second dielectric mask layer have a high etch selectivity.