Hard Mask Pattern Transfer for Sub-7 nm Resist Scum Control

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Solution Overview

Problem

At semiconductor technology nodes of 7 nm or smaller, line-and-space patterning requires pitch resolution in optical lithography smaller than about 32 nm, which is challenging even with EUV lithography, leading to issues like resist scum defects and low etching selectivity in current manufacturing processes.

Innovation Solution

A method involving the formation of a hard mask pattern over a patterned photoresist layer with scums, followed by planarization and etching using the hard mask as a mask to pattern the underlying layer, thereby reducing defects and improving etching selectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If EUV lithography is employed to achieve smaller pitch resolution, then the resolution limitation is reduced from about 28 nm to about 34 nm, but resist scum defects and low etching selectivity occur

Engineering Contradiction:
Improvepitch resolutionVSAvoidresist scum defects
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A hard mask layer is introduced as an intermediary between the photoresist pattern and the underlying layer to be etched. This hard mask layer serves as a protective intermediary that prevents resist scum defects from affecting the etching process and provides the necessary etching selectivity, thereby resolving the contradiction between achieving fine pitch resolution and maintaining pattern reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patterning process is segmented into multiple stages: first forming the photoresist pattern with EUV lithography, then depositing a separate hard mask layer, and finally performing etching. This segmentation allows each layer to perform its specific function optimally - the photoresist for pattern definition and the hard mask for defect-free etching - thus resolving the contradiction between resolution and reliability

Inventive Principle:
Principle #1Segmentation

2Device complexity

If a photoresist pattern is directly used for etching, then the lithography process is simple, but etching selectivity is low and defects occur

Engineering Contradiction:
Improvelithography process complexityVSAvoidetching selectivity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent uses a composite structure consisting of a photoresist layer combined with a hard mask layer. The photoresist provides pattern definition while the hard mask material (such as silicon oxide, silicon nitride, or tantalum oxide) provides high etching selectivity. This composite approach maintains relative process simplicity while dramatically improving etching precision and reducing defects

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If the photoresist layer thickness is reduced to improve pattern resolution, then finer patterns can be formed, but etching resistivity against the underlying layer decreases

Engineering Contradiction:
Improvepattern resolutionVSAvoidetching resistivity
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The hard mask layer acts as an intermediary that compensates for the reduced etching resistivity of thin photoresist layers. While the thin photoresist layer maintains high pattern resolution, the hard mask layer provides the necessary etching strength and selectivity, allowing the system to achieve both fine resolution and adequate etching protection simultaneously

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces pattern defects and enhances etching selectivity, allowing for finer patterns without defects and improving the throughput of the lithography process.

Implementation Method 1

an exposure dose amount smaller than the optimum dose is determined, the photo resist layer is exposed to the actinic radiation carrying pattern information with the determined exposure dose amount

Methodology Applied
Scientific EffectPhoto lithography: Photopolymerisation

Data Source

PatentUS20250308893A1Method of manufacturing semiconductor devices
Publication Date: 2025.10.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250308893A1 patent drawing
  • US20250308893A1 patent drawing
  • US20250308893A1 patent drawing

AI summary

In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.