Hard Mask Patterning for Resist Scum Defects in Semiconductor Etching

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Solution Overview

Problem

In semiconductor manufacturing, especially at 7 nm or smaller nodes, EUV lithography faces challenges with resolution limitations and high costs due to expensive equipment, and the decreasing feature sizes lead to resist scum defects and etching issues with photo resist layers.

Innovation Solution

A method involving the formation of a hard mask pattern over a patterned photo resist layer with scum defects, using it as an etching mask to reduce pattern defects and improve etching selectivity, while employing EUV or DUV lithography technologies to enhance productivity and reduce manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If EUV lithography is used to achieve smaller pitch resolution, then manufacturing precision is improved, but manufacturing cost increases due to expensive equipment

Engineering Contradiction:
Improvepitch resolutionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

A hard mask layer is introduced as an intermediary between the photo resist layer and the underlying layer. This hard mask layer serves as a mediator that protects against etching defects caused by resist scum while enabling the use of more cost-effective DUV lithography equipment, thus resolving the contradiction between achieving high precision and reducing manufacturing cost

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If photo resist layer thickness is reduced to improve pattern resolution, then manufacturing precision is improved, but etching selectivity worsens due to insufficient etching protection

Engineering Contradiction:
Improvepattern resolutionVSAvoidetching selectivity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The masking function is segmented into two independent layers: the photo resist layer for pattern definition and the hard mask layer for etching protection. This segmentation allows the photo resist layer to be optimized for resolution while the hard mask layer provides sufficient thickness and selectivity for reliable etching, resolving the contradiction between pattern resolution and etching selectivity

Inventive Principle:
Principle #1Segmentation

3Manufacturing precision

If multiple lithography exposures are performed to achieve smaller features, then manufacturing precision is improved, but productivity decreases due to increased process steps

Engineering Contradiction:
Improvefeature sizeVSAvoidthroughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention changes the material parameter of the mask layer from soft photo resist alone to a composite structure with hard mask material. This parameter change enables single-exposure lithography to achieve the desired precision without requiring multiple exposure steps, thus maintaining high productivity while improving manufacturing precision

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces resist scum defects and improves etching selectivity, thereby enhancing the productivity and reducing manufacturing costs of semiconductor devices by using a hard mask pattern to conceal and manage resist scums during the etching process.

Implementation Method 1

a photo resist layer is exposed to an actinic radiation carrying pattern information from a photo mask

Methodology Applied
Scientific EffectPhoto lithography: Photopolymerisation

Data Source

PatentUS11961738B2Method of manufacturing semiconductor devices
Publication Date: 2024.04.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11961738B2 patent drawing
  • US11961738B2 patent drawing
  • US11961738B2 patent drawing

AI summary

In a method of forming a pattern, a first pattern is formed over an underlying layer, the first pattern including main patterns and a lateral protrusion having a thickness of less than 25% of a thickness of the main patterns, a hard mask layer is formed over the first pattern, a planarization operation is performed to expose the first pattern without exposing the lateral protrusion, a hard mask pattern is formed by removing the first pattern while the lateral protrusion being covered by the hard mask layer, and the underlying layer is patterned using the hard mask pattern as an etching mask.