Hard Mask Spacer Line Width Definition in Flash Memory
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Solution Overview
Problem
In semiconductor manufacturing, the miniaturization of components in flash memory devices leads to challenges such as overlay shifts and ion beam scattering during lithography and etching processes, resulting in structures that are smaller than intended due to issues with multilayer photoresist layers.
Innovation Solution
A method involving a hard mask stack with a first and second hard mask layer, where the second hard mask layer is patterned with wide and narrow masks, and spacers are formed on the sidewalls to define line widths, allowing for precise etching and pattern transfer without additional photomasks, thereby reducing process complexity and cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multilayer photoresist layers are used for patterning small-sized semiconductor structures, then component density can be increased, but overlay shifts occur during lithography resulting in manufacturing precision degradation
Solution Approach 1:
The patent extracts and removes the narrow masks between neighboring spacers by etching, leaving only the wide mask and spacers. This simplifies the mask structure from multiple layers to a single etching mask layer, eliminating overlay shift issues while maintaining the ability to define both wide and narrow features through the spacer-assisted etching process.
Solution Approach 2:
The spacers serve as intermediary structures that enable precise definition of narrow features without requiring narrow photoresist masks. The spacers are formed on sidewalls and act as self-aligned masks during etching, allowing the formation of narrow patterns with high precision while using only a single photoresist layer for the wide mask.
2Manufacturing precision
If ion beam etching is used for high precision patterning, then etching accuracy improves, but ion beam scattering occurs resulting in structure size deviation
Solution Approach 1:
The patent performs preliminary actions by forming the spacers and wide mask structure before the final etching step. The spacers are pre-formed on the sidewalls to define the narrow feature dimensions, and the wide mask is prepared in advance. This preliminary structuring allows the etching process to proceed with reduced ion beam scattering effects since the mask structure is optimized and self-aligned.
3Manufacturing precision
If additional photomasks are used to define multiple line widths, then pattern definition accuracy improves, but process complexity and cost increase
Solution Approach 1:
The patent makes the single etching mask structure (comprising the wide mask and spacers) perform multiple functions: defining both wide line widths (through the wide mask itself) and narrow line widths (through the spacers on sidewalls). This eliminates the need for separate photomasks for different line widths, reducing process complexity while maintaining the ability to define multiple feature sizes with high precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces process difficulties and costs by allowing for accurate definition of component structures, such as word line and select gate structures, in flash memory devices, improving the precision and reliability of semiconductor structure formation.
Implementation Method 1
A photoresist layer is formed to cover a top surface of the second wide mask. The photoresist layer covers side surfaces of a pair of spacers on the sidewalls of the second wide mask.
Implementation Method 2
The second narrow masks between the neighboring spacers are removed by an etching process.
Data Source
AI summary
A method for forming a semiconductor structure is provided. The method includes: forming first and second hard mask layers and a target layer on a substrate; patterning the second hard mask layer to form patterned second hard masks including a second wide mask and second narrow masks; and forming spacers on sidewalls of the second wide mask and the second narrow masks. Then, a photoresist layer is formed to cover the second wide mask and the spacers on the sidewalls of the second wide mask. The second narrow masks and the photoresist layer are removed. And, the first hard mask layer is etched with the spacers and the second wide mask together as a mask to form patterned first hard masks on the target layer, wherein the spacers define a first line width, and the second wide mask and the pair of spacers define a second line width.