Hard Mask Spacer Pattern Formation for Sub-Lithographic Pitch
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Solution Overview
Problem
Current optical lithography techniques are limited in achieving sub-lithographic sized line and space patterns, hindering the miniaturization of semiconductor devices and limiting the resolution of patterned substrates.
Innovation Solution
A method involving a substrate with multiple hard mask layers and a photoresist layer, where the photoresist is transferred into patterns, followed by resist trimming and conformal spacer deposition, allowing for anisotropic dry etching to achieve patterns with a reduced, fine pitch that is one-quarter of the original pitch, utilizing conventional lithography systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography techniques are used, then manufacturing process simplicity is maintained, but pattern resolution is limited to lithography limits
Solution Approach 1:
The manufacturing process is divided into multiple distinct stages: initial lithography to form first patterns, resist trimming to create trimmed features, spacer deposition to form spacers on sidewalls, and selective etching to create final patterns. Each stage produces intermediate structures that are refined in subsequent stages, allowing complex fine-pitch patterns to be achieved through sequential simpler operations rather than a single complex lithography step.
Solution Approach 2:
The invention transitions from two-dimensional planar patterning to three-dimensional structure formation. By depositing conformal spacer layers on the sidewalls of trimmed features and using vertical etching, the process creates patterns in the vertical dimension that translate to reduced horizontal pitch. This dimensional transition enables pitch reduction beyond the lateral resolution limits of conventional lithography.
2Length of moving object
If feature sizes are reduced to increase circuit density, then higher performance and density are achieved, but lithography resolution requirements become more stringent
Solution Approach 1:
The conformal spacer layers are deposited to uniformly cover the sidewalls of the trimmed features, and the subsequent anisotropic etching automatically creates patterns with dimensions determined by the spacer thickness rather than by lithographic projection. This self-aligned process inherently produces consistent feature sizes and spacing without requiring super-resolution lithography, as the critical dimensions are defined by thin film deposition control rather than optical resolution.
Solution Approach 2:
The invention changes the controlling parameter for feature size from lithographic wavelength and optical resolution to thin film deposition thickness. By using atomic layer deposition or chemical vapor deposition to form spacers with precisely controlled thicknesses (e.g., 10-50 nm), the process achieves sub-lithographic feature sizes where the critical dimension is determined by film thickness control rather than optical projection limits.
3Quantity of substance
If pitch is reduced to increase circuit density, then higher density is achieved, but conventional lithography systems cannot achieve the required resolution
Solution Approach 1:
The process performs preliminary lithography to create relaxed-pitch first patterns that are larger than the final target pitch. These first patterns serve as templates for subsequent spacer formation, where the spacers deposited on the sidewalls define the final fine-pitch features. This preliminary action allows the use of conventional lithography at its resolution limits while still achieving finer final pitch through the spacer-mediated multiplication process.
Solution Approach 2:
The conformal spacer layers act as intermediary structures that mediate between the lithographically-defined first patterns and the final fine-pitch patterns. The spacers transfer and refine the pattern information, converting relaxed-pitch lithographic features into sub-lithographic pitch features through controlled deposition and selective etching, thereby enabling pitch reduction without requiring super-resolution lithography.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of patterns with significantly reduced pitch, enhancing semiconductor manufacturing resolution beyond conventional lithography limits, thereby supporting smaller feature sizes and higher performance in integrated circuits.
Implementation Method 1
lithography is commonly used to pattern these features. Because lithography is typically accomplished by projecting light or radiation onto a surface
Implementation Method 2
An anisotropic dry etching process is then performed to etch away regions of the second hard mask layer that are not protected by the spacers
Data Source
AI summary
A substrate having a target material layer is provided. A first hard mask layer, a second hard mask layer, and a photoresist layer are formed on the target material layer. The photoresist layer is transferred into first patterns on the second hard mask layer. Regions of the second hard mask layer not protected by the first patterns are etched away, thereby forming second patterns. The first patterns are trimmed to form trimmed features. A conformal spacer material layer is deposited on the trimmed features, the second patterns, and the first hard mask. The spacer material layer is etched to form first spacers on sidewalls of the trimmed features, and second spacers on sidewalls of the second patterns. The trimmed features are removed. Regions of the second patterns not protected by the first spacers are removed, thereby forming patterns with a reduced, fine pitch.