Hard Mask Spacer Structure for DRAM Contact Hole Patterning

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Solution Overview

Problem

Existing self-aligned contact hole patterning methods for densely packed DRAM arrays face challenges in maintaining critical dimension control due to varying contact hole profiles, leading to alignment and resistance issues as feature sizes shrink.

Innovation Solution

A hard mask spacer structure is introduced, comprising a first spacer defining asteriated hole patterns and a second spacer inlaid into these patterns to round them, using atomic layer deposition and anisotropic dry etching processes to achieve consistent hole profiles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a self-aligned contact process is used to reduce contact hole size and increase alignment exactitude, then alignment margin is improved and contact resistance is reduced, but different contact hole profiles occur resulting in critical dimension control issues

Engineering Contradiction:
Improvecritical dimension controlVSAvoidcontact hole profile consistency
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent divides the spacer formation into two distinct segments: a first spacer formed conformally on the contact hole sidewalls, and a second spacer formed subsequently to fill and round the asteriated hole patterns. This segmentation allows each spacer to perform a specific function - the first spacer provides initial alignment while the second spacer corrects profile variations, thereby resolving the contradiction between achieving small contact holes and maintaining profile consistency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first spacer is formed in advance as a preliminary structure that defines the initial hole patterns. This preliminary action creates the asteriated patterns that are subsequently rounded by the second spacer, allowing the system to prepare the structure for final precision formatting before the actual contact hole etching occurs

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances alignment margin and reduces contact resistance by ensuring consistent and rounded hole patterns, thereby improving critical dimension control and patterning accuracy in densely packed DRAM arrays.

Implementation Method 1

using atomic layer deposition and anisotropic dry etching processes

Methodology Applied
Scientific EffectAtomic layer deposition: Chemical Vapour Deposition

Implementation Method 2

using atomic layer deposition and anisotropic dry etching processes

Methodology Applied
Scientific EffectAnisotropic dry etching: Plasma

Data Source

PatentUS8697316B2Hard mask spacer structure and fabrication method thereof
Publication Date: 2014.04.15 NAN YA TECH
  • US8697316B2 patent drawing
  • US8697316B2 patent drawing
  • US8697316B2 patent drawing

AI summary

A hard mask spacer structure includes a first spacer on a device layer, the first spacer defining a plurality of hole patterns and at least an asteriated hole pattern between the hole patterns; and a second spacer on the first spacer and inlaid into the asteriated hole pattern, thereby rounding the asteriated hole pattern.