Composite Hard Mask Etching for Sparse High-Aspect-Ratio Patterns
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Solution Overview
Problem
The challenge of insufficient etching and critical dimension reduction occurs in semiconductor structures with high aspect ratios due to the etching load effect, where the etching pattern is sparse, leading to uneven etching rates and structural defects.
Innovation Solution
A method involving the formation of a composite hard mask layer with a hard mask layer and an etching stop layer, where a first target pattern and redundant pattern are formed, allowing for controlled etching by using these patterns as masks to create a target structure while minimizing the etching load effect through the use of a redundant structure that is stopped by the etching stop layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If etching is performed on a high aspect ratio structure with sparse patterns, then the etching process can complete the removal of material, but the etching load effect causes insufficient etching and critical dimension reduction
Solution Approach 1:
The patent applies preliminary action by forming a redundant pattern structure before the main etching process. This redundant structure is created in advance to balance the etching load, ensuring that when the actual pattern is etched, the etching conditions are optimized and critical dimensions are maintained. The redundant structure serves as a placeholder that pre-adjusts the etching environment.
Solution Approach 2:
The patent changes the parameter of pattern density by introducing redundant structures. This modifies the etching load distribution across the substrate, transforming the sparse pattern condition into a more balanced etching environment. By adjusting the effective pattern density through redundant elements, the etching process achieves both complete material removal and precise critical dimension control.
2Device complexity
If the etching pattern is sparse, then the structure can be formed with fewer elements, but the etching load effect causes uneven etching rates and structural defects
Solution Approach 1:
The redundant pattern structure is formed preliminarily to establish balanced etching conditions before the actual pattern definition. This preliminary structure ensures uniform etching rates across the substrate by distributing the etching load evenly, preventing localized defects while maintaining the intended sparse final pattern.
Solution Approach 2:
The patent converts the harmful effect of sparse patterns (which cause uneven etching) into a benefit by deliberately adding redundant structures. These redundant elements, which might seem to increase complexity, actually improve etching uniformity by balancing the load, thereby converting the original problem into a solution that enhances reliability.
3Device complexity
If a single hard mask layer is used, then the process is simple, but it cannot effectively control the etching load effect in high aspect ratio structures
Solution Approach 1:
The patent segments the mask function into two distinct parts: the hard mask layer for pattern definition and the redundant pattern structure for load balancing. This segmentation allows each component to perform its specific function optimally - the hard mask defines the actual pattern while the redundant structure controls the etching load, achieving precise etching control without excessive overall complexity.
Solution Approach 2:
The redundant pattern structure serves multiple functions simultaneously: it acts as an etching load balancer, a process control element, and a template for achieving uniform etching. By making this structure multi-functional, the patent achieves precise etching control while minimizing the need for additional complex mask layers or process steps.
Data Source
AI summary
A semiconductor structure and a method for preparing a semiconductor structure are provided. The method includes: a composite hard mask layer is formed on an etching layer, the composite hard mask layer including a hard mask layer and an etching stop layer surrounded by the hard mask layer; a first target pattern and a first redundant pattern are formed in the composite hard mask layer; a remaining part of the etching stop layer is removed to form a second target pattern and a second redundant pattern in the hard mask layer; etching is performed by using the second target pattern and the second redundant pattern as masks to form a target structure in the etching layer and to form a redundant structure in the hard mask layer; and a remaining part of the hard mask layer is removed.


