Carbon-Rich Hard Mask Trimming for Precise Semiconductor Patterning
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Solution Overview
Problem
As semiconductor devices downscale, there is an increasing need to form more exact patterning layers that match theoretical design criteria to reduce edge placement errors and improve process windows, particularly in forming conductive interconnect features.
Innovation Solution
A directional ion beam trimming process is applied to a carbon-rich hard masking layer, reshaping features from triangular to substantially square shapes, which hardens the layer and reduces etching rates, allowing precise control of critical dimensions and reducing line-end bridge defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography and etching processes are used for down-scaled semiconductor devices, then manufacturing complexity is reduced, but edge placement errors increase and patterning precision deteriorates
Solution Approach 1:
A carbon-rich hard masking layer is formed over the target layer before patterning. This preliminary action creates a hardened mask that resists etching variations and maintains precise pattern transfer, directly addressing edge placement errors without adding significant process complexity
Solution Approach 2:
The patent changes the material parameter of the masking layer from conventional photosensitive materials to carbon-rich materials. This parameter change provides superior etch resistance and pattern fidelity, improving manufacturing precision while the carbon-rich material's inherent properties simplify process control
2Manufacturing precision
If the masking layer is made softer for easier patterning, then ease of manufacture improves, but etching rate control and critical dimension precision worsen
Solution Approach 1:
The carbon-rich hard masking layer transforms the material parameters of the mask, providing optimal balance between patterning ease and etching resistance. The carbon-rich composition enables precise critical dimension control while maintaining manufacturability through standard deposition and patterning techniques
Solution Approach 2:
The patent employs a composite structure with the carbon-rich hard masking layer over the target layer. This composite approach combines the benefits of a hardened, etch-resistant mask with the underlying target layer, achieving superior critical dimension control without compromising ease of manufacture
3Productivity
If feature spacing is reduced to increase device density, then productivity improves, but line-end bridge defects increase
Solution Approach 1:
The carbon-rich hard masking layer is formed in advance to establish precise pattern definitions before etching. This preliminary patterning with enhanced etch resistance prevents line-end bridge defects even when features are closely spaced, enabling higher device density without sacrificing reliability
Solution Approach 2:
Changing to carbon-rich masking material alters the etching parameters and pattern transfer fidelity. This parameter change maintains sharp feature definitions and prevents bridging at line-ends, allowing reduced feature spacing and improved productivity while maintaining reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process achieves up to a 76% reduction in line-end bridge defects and improves edge placement accuracy, enhancing the uniformity and distribution of line-end critical distances.
Implementation Method 1
performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer
Implementation Method 2
which hardens the layer and reduces etching rates, allowing precise control of critical dimensions
Data Source
AI summary
A method for forming a semiconductor device is provided. In some embodiments, the method includes forming a target layer over a semiconductor substrate, forming a carbon-rich hard masking layer over the target layer, patterning features in the carbon-rich hard masking layer using an etching process, performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer, and patterning the target layer using the carbon-rich hard masking layer as a mask.


