Hard Mask via Hole Patterning in Printed Wiring Boards
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Solution Overview
Problem
Current methods for producing printed wiring boards with via holes of <10 μm dimension size are limited by the capabilities of UV and CO2 lasers, and Reactive Ion Etch (RIE) processes require lithography and full erosion of resist, damaging the dielectric surface.
Innovation Solution
A method involving a hard mask, such as metal nitride, is applied to protect the dielectric surface during RIE, allowing for precise patterning and transfer of via holes without damaging the dielectric, using RIE for dry etching to achieve sub-micron dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If UV or CO2 laser process is used to fabricate via holes, then the process is simple and easy to operate, but the via hole dimension cannot be reduced below 15 μm (UV laser) or 20 μm (CO2 laser)
Solution Approach 1:
The via hole formation process is segmented into multiple steps: first forming a hard mask layer on the dielectric surface, then using photolithography to create a pattern, followed by RIE to etch through the hard mask and dielectric. This segmentation allows each step to be optimized independently, achieving sub-10 μm precision without sacrificing overall process manageability
Solution Approach 2:
A hard mask layer is applied to the dielectric surface before the RIE process. This preliminary action protects the dielectric surface from ion bombardment damage while enabling precise pattern transfer, allowing via holes smaller than 10 μm to be formed without compromising dielectric integrity
2Manufacturing precision
If RIE process is used to achieve via holes of <10 μm, then the manufacturing precision is improved, but the dielectric surface is damaged due to ion bombardment and full erosion of resist
Solution Approach 1:
A hard mask layer (such as metal nitride) is deposited on the dielectric surface before the RIE process. This hard mask serves as a protective barrier that prevents ion bombardment from reaching and damaging the dielectric surface, while still allowing the RIE process to achieve the desired sub-10 μm via hole precision
Solution Approach 2:
The hard mask layer acts as an intermediary between the RIE process and the dielectric surface. It absorbs the harmful ion bombardment effects while transmitting the beneficial pattern transfer, enabling precise via hole formation without surface damage to the underlying dielectric
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of printed wiring boards with via holes of <10 μm dimension size while maintaining an intact and undamaged dielectric surface, enhancing the precision and reliability of the manufacturing process.
Implementation Method 1
an insulating layer is formed, for example, by laminating a resin composition layer on an internal layer circuit substrate with an adhesive film having a resin composition layer and thermally curing the resin composition layer
Implementation Method 2
coating or laminating a photo-sensitive material on said hard mask and developing said photo-sensitive material, to form a pattern of one or more via
Implementation Method 3
forming one or more openings in said hard mask corresponding to said one or more via in said photosensitive material with dry etching; and forming one or more via in said dielectric corresponding to said one or more via in said photosensitive material by dry etching
Data Source
AI summary
By interposing a hard mask between a dielectric and photo-sensitive material it is possible to form fine via in the dielectric by dry etching without damaging the remaining surface of the dielectric.