3D Memory Page Buffer Sensing for Faster Multi-State Reads

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Solution Overview

Problem

Existing memory technologies face challenges in efficiently distinguishing and reading multiple memory states in three-dimensional memory devices due to the small channel current, which complicates direct measurement and prolongs reading times.

Innovation Solution

A method involving a read operation using multiple read voltages to obtain hard and soft read values, storing these values and inhibition information in a page buffer's latches, and employing a peripheral circuit to process these values to obtain hard and soft data efficiently, reducing sensing times through continuous sensing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple read voltages are applied to distinguish multiple memory states in three-dimensional memory cells, then measurement precision is improved, but reading time is prolonged

Engineering Contradiction:
Improvedistinguishing accuracy of memory statesVSAvoidreading time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a first sensing operation to obtain hard read values before performing a second sensing operation to obtain soft read values. This sequential approach allows the system to quickly eliminate clearly distinguishable memory states through hard reading, then focus subsequent soft reading operations only on ambiguous cases, thereby reducing the total time required for accurate multi-state distinction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the reading process into two distinct phases: hard reading and soft reading. Hard reading uses multiple read voltages to quickly identify and eliminate clearly distinguishable memory states, while soft reading is then applied only to remaining ambiguous states. This segmentation allows the system to optimize each phase separately, improving overall reading efficiency without sacrificing measurement precision.

Inventive Principle:
Principle #1Segmentation

2Productivity

If continuous sensing operations are performed to obtain hard and soft read values, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvedata retrieval speedVSAvoidcontrol circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality by designing the page buffer to serve multiple purposes: it stores hard read values, soft read values, and inhibition information simultaneously. The same sensing circuitry is used for both hard and soft reading operations, and the latches are configured to handle different types of data (hard data, soft data, inhibition information) without requiring separate dedicated circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent uses inhibition information as an intermediary element that mediates between hard reading and soft reading operations. The inhibition information, stored in a dedicated latch, controls which memory cells should undergo soft reading by preventing redundant operations on already-resolved cells. This intermediary mechanism coordinates the continuous sensing operations without requiring complex external control logic.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12393365B2Method of controlling memory, memory and memory system
Publication Date: 2025.08.19 YANGTZE MEMORY TECH CO LTD
  • US12393365B2 patent drawing
  • US12393365B2 patent drawing
  • US12393365B2 patent drawing

AI summary

According to one aspect of the present disclosure, a method of controlling a memory is provided. The method may include performing a read operation based on a read voltage corresponding to a target logical page to obtain a hard read value and a soft read value of the target logical page. The method may include storing the hard read value, the soft read value, and inhibition information into three latches in a page buffer respectively. The method may include obtaining hard data of the target logical page based on the hard read value of the target logical page. The method may include obtaining soft data of the target logical page based on the hard data and the soft read value of the target logical page. The memory may include a plurality of memory cells, each configured to store N-bit data, where N is an integer greater than 1.