Hardmask Line Patterning with Isotropic Etching for BEOL Spacing
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Solution Overview
Problem
Current methods for patterning back-end-of-line (BEOL) interconnect structures in semiconductor fabrication face challenges in achieving precise tip-to-tip spacing and reducing edge placement errors due to limitations in optical lithography and etch mask processes.
Innovation Solution
A method involving multiple hardmask layers and block masks, where an isotropic etching process is used to widen lines formed in the hardmask layers, allowing for precise transfer of patterns to an interlayer dielectric layer, thereby reducing edge placement errors and achieving the desired tip-to-tip spacing in the BEOL interconnect structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional optical lithography and etch mask processes are used for patterning, then the manufacturing process is simple, but the tip-to-tip spacing precision and edge placement accuracy are insufficient
Solution Approach 1:
The patent divides the patterning process into multiple stages using different mask layers (first hardmask layer, second hardmask layer, block mask layer) and sequential etching steps. Each layer and step performs a specific function: the first hardmask defines initial lines, the block mask creates gaps at specific locations, and the second hardmask transfers and refines the pattern. This segmentation enables precise tip-to-tip spacing by breaking down the complex patterning task into manageable, precision-controlled steps.
Solution Approach 2:
The patent introduces a vertical dimension by stacking multiple hardmask layers and a block mask layer at different heights. The first hardmask layer is patterned first, then the block mask layer is formed in cuts through the first hardmask, and finally the second hardmask layer is patterned and etched. This multi-layer vertical structure allows for precise spatial control of pattern features that cannot be achieved with a single planar mask layer.
2Manufacturing precision
If multiple hardmask layers and block masks are used to improve precision, then edge placement accuracy improves, but the manufacturing process becomes more complex
Solution Approach 1:
The patent performs preliminary patterning actions by first forming the first hardmask layer with initial line patterns, then creating cuts and filling them with block mask material before patterning the second hardmask layer. The block mask is prepared in advance at specific locations where gaps are needed. These preliminary actions establish a pre-configured mask structure that guides the final pattern transfer, improving edge placement accuracy while making the overall process more systematic and controllable.
3Length of moving object
If isotropic etching is used to widen lines, then the desired line width and spacing are achieved, but the process selectivity requirements increase
Solution Approach 1:
The patent changes the etching parameters by using an isotropic etching process for the second hardmask layer instead of an anisotropic process. This isotropic etching allows the lines to widen laterally as they are etched, achieving the desired final line width and spacing. The process relies on the etch front propagating in all directions equally, which requires careful control of etch depth and duration to maintain reliability and achieve the target dimensions.
Solution Approach 2:
The patent employs a composite mask structure consisting of multiple hardmask layers with different materials or properties. The first hardmask layer and second hardmask layer are patterned and etched with different selectivities, allowing the isotropic etching of the second layer to widen lines while the first layer maintains the original pattern definition. This composite approach enables simultaneous achievement of precise pattern definition and controlled line widening.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the precision and accuracy of BEOL interconnect patterning, reducing edge placement errors and achieving the desired dimensions and spacing in the interlayer dielectric layer, which is critical for reliable semiconductor device performance.
Implementation Method 1
etching the second hardmask layer with an isotropic etching process that removes the second hardmask layer selective to the first hardmask layer such that the second lines are widened relative to the first lines
Data Source
AI summary
Methods of patterning a structure. A first hardmask layer is deposited on a second hardmask layer. A cut is formed that penetrates through the first hardmask layer and the second hardmask layer. A block mask is formed in the cut. The first hardmask layer is patterned to form first lines penetrating through the first hardmask layer to the second hardmask layer with at least one of the first lines superimposed on the block mask. After patterning the first hardmask layer, the second hardmask layer is patterned to transfer the first lines from the first hardmask layer to the second hardmask layer to form second lines penetrating through the second hardmask layer. The second hardmask layer is etched with an isotropic etching process that removes the second hardmask layer selective to the first hardmask layer such that the second lines are widened relative to the first lines.