Hardmask Sidewall Modification for Precise Underlayer Etching

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Solution Overview

Problem

Semiconductor device fabrication faces challenges in achieving precise etch profiles and reliability as feature sizes shrink and aspect ratios increase, particularly in single digit nanometer processes.

Innovation Solution

A method involving the formation of a modification layer along the sidewalls of a patterned hardmask layer, using deposition processes like CVD and PVD, to enhance the etch profile and reliability by compensating for non-uniform sidewall distances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If feature sizes are decreased and aspect ratios are increased to scale down semiconductor devices, then device density and integration are improved, but etch profile precision and manufacturing reliability deteriorate

Engineering Contradiction:
Improvefeature sizeVSAvoidetch profile precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

A modification layer is deposited on the sidewalls of the hardmask layer before the etching process. This preliminary action compensates for the non-uniform spacing between sidewall portions, ensuring that the etch front progresses uniformly and achieves the desired etch profile precision even at reduced feature sizes and high aspect ratios.

Inventive Principle:
Principle #10Preliminary action

2Area of moving object

If feature sizes are decreased and aspect ratios are increased to scale down semiconductor devices, then device density and integration are improved, but manufacturing reliability deteriorates

Engineering Contradiction:
Improvefeature sizeVSAvoidmanufacturing reliability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The modification layer is formed in advance on the sidewalls to compensate for non-uniform sidewall spacing. This preliminary compensation ensures uniform etch progression and prevents defects such as bowing profiles, thereby maintaining manufacturing reliability even as devices are scaled to smaller dimensions with higher aspect ratios.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a modification layer is deposited along sidewalls to compensate for non-uniform spacing, then etch profile precision is improved, but process complexity increases

Engineering Contradiction:
Improveetch profile precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

A modification layer serving as an intermediary is deposited on the sidewalls of the hardmask layer. This intermediary layer compensates for non-uniform sidewall spacing and enables uniform etch progression, improving etch profile precision while adding only a single deposition step to the existing process flow.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Improves etch profile and performance reliability by ensuring uniform sidewall spacing and reducing bowing, facilitating high aspect ratio etching and enhancing device stability.

Implementation Method 1

depositing a modification layer extending along at least the respective portions of the sidewalls of each of the protruding structures

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

depositing a modification layer extending along at least the respective portions of the sidewalls of each of the protruding structures

Methodology Applied
Scientific EffectPhysical Vapor Deposition: Physical Vapour Deposition

Data Source

PatentUS12598932B2Methods and structures for improving etch profile of underlying layers
Publication Date: 2026.04.07 TOKYO ELECTRON LTD
  • US12598932B2 patent drawing
  • US12598932B2 patent drawing
  • US12598932B2 patent drawing

AI summary

Semiconductor devices and corresponding methods of manufacture are disclosed. The method may include forming a first hardmask layer over a substrate. The method may include forming a second hardmask layer over the first hardmask layer. The method may include transferring a pattern from the second hardmask layer to the first hardmask layer, wherein the pattern in the first hardmask layer comprises a plurality of protruding structures, and each of the plurality of protruding structures has respective portions of its two sidewalls extending toward each other. The method may include depositing a modification layer extending along at least the respective portions of the sidewalls of each of the protruding structures. The method may include etching the substrate with the protruding structures and the modification layer both serving as a mask.