Hardmask Via Hole Etching for Residue Removal in Wafer Bonding
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in thoroughly and selectively removing residues and barrier metals from via holes in high-integrated circuits, which complicates the bonding process of wafers and can affect device characteristics.
Innovation Solution
A method involving the formation of a hard mask layer, etching to create a via hole, followed by cleaning with solvents and hot DIW to remove residues, and selective removal of barrier metals using a specific etchant composition, ensuring efficient bonding and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If via holes are formed with small size (minimum width of about 10 μm and minimum depth of about 70 μm) to achieve high integration, then device integration density is improved, but thorough removal of residues remaining in the via holes becomes difficult
Solution Approach 1:
The patent segments the via hole structure by forming a protrusion at the bottom of the via hole that extends into the underlying layer. This protrusion structure divides the via hole into an upper portion and a lower portion, allowing differential etching and cleaning processes to be applied to different segments, thereby enabling thorough residue removal while maintaining small via hole dimensions for high integration
Solution Approach 2:
The patent performs preliminary actions by forming the protrusion structure before final via hole completion, and by performing multiple cleaning steps (first cleaning process and second cleaning process) at different stages. The first cleaning process removes residues from the upper portion, and the second cleaning process removes residues from the lower portion, ensuring complete residue removal before subsequent processing steps
2Device complexity
If multiple layers (W, Ti, TiN) need to be removed simultaneously to simplify the bonding process, then process complexity is reduced, but selective removal of specific layers becomes more difficult
Solution Approach 1:
The patent applies local quality by using a selectively removable layer with distinct properties from other layers. The protrusion structure is formed from a material that can be selectively removed by specific etchants, allowing localized removal of the protrusion and associated layers while preserving other layers. This enables precise control over which layers are removed at specific locations
Solution Approach 2:
The patent utilizes parameter changes by employing different etchants with specific chemical properties that selectively react with different materials. The first etchant is designed to selectively remove the selectively removable layer material, while the second etchant removes other layers. By changing etchant parameters (chemical composition, concentration, temperature), the process achieves selective layer removal without affecting other layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances bonding efficiency, effectively removes residues and barrier metals, and maintains device characteristics by ensuring precise removal of metals from the via holes, preventing non-uniformity and adhesion issues.
Implementation Method 1
forming a photoresist pattern by coating photoresist on and/or over the exposed region of hard mask layer 140 and then patterning the coated photoresist by photolithography
Implementation Method 2
forming a hard mask pattern by etching the hard mask layer using the photoresist pattern as an etching mask; and then forming a via hole by etching the first and the second wafers
Implementation Method 3
performing a first cleaning process to remove residues from the via hole; and then performing a second cleaning process to remove any residues remaining in the via hole
Implementation Method 4
selectively removing portions of the barrier metal layer and the second metal layer to expose portions of the via hole
Data Source
AI summary
A semiconductor device and a method for manufacturing the device include connecting a second wafer to a first wafer, forming a hard mask layer on and/or over a backside of the second wafer, forming a hard mask pattern over the second layer and then forming a via hole by etching the first and the second wafers to a predetermined depth using the hard mask pattern as an etching mask.