Hardware Accelerator Access via Secure and Non-Secure Channels

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Solution Overview

Problem

The existing system architecture requires non-secure processing components to communicate with secure processing components to access hardware accelerators, leading to increased data transfers, resource wastage, and complexity due to multi-processor interactions and software splits.

Innovation Solution

Implementing a system where hardware accelerators are accessible by both secure and non-secure processing components through separate channels, eliminating the need for multi-processor interactions and software splits, and incorporating additional security components to maintain system security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-secure processing components communicate with secure processing components to access hardware accelerators, then system security is maintained, but data transfer volume increases and system complexity increases

Engineering Contradiction:
Improvesystem securityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system is segmented into secure and non-secure domains with separate access paths. Non-secure processing components access hardware accelerators through a non-secure channel, while secure processing components access through a secure channel. This segmentation allows independent access paths that reduce inter-domain communication overhead and system complexity while maintaining security boundaries.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hardware accelerator is positioned as an intermediary resource that can be accessed by both secure and non-secure domains through separate channels. This eliminates the need for non-secure components to communicate with secure components, reducing message passing and interaction complexity while maintaining security isolation.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If non-secure processing components communicate with secure processing components to access hardware accelerators, then access control is maintained, but number of data transfers increases

Engineering Contradiction:
Improveaccess controlVSAvoiddata transfer volume
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Access channels are segmented into secure and non-secure paths. Non-secure processing components directly access hardware accelerators through non-secure channels, eliminating the need to transfer data through secure processing components. This segmentation reduces data transfer volume while maintaining access control through channel-level security management.

Inventive Principle:
Principle #1Segmentation

3Reliability

If hardware accelerators are exclusively in the secure domain, then security is enhanced, but accessibility by non-secure components requires additional communication overhead

Engineering Contradiction:
ImprovesecurityVSAvoidaccess efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The hardware accelerator is designed with universal access capability, allowing both secure and non-secure processing components to access it through their respective channels. This multi-functionality enables the same hardware resource to serve both security-critical and non-security-critical operations without requiring separate accelerator instances, improving resource utilization and access efficiency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11784792B2Secure software interface
Publication Date: 2023.10.10 INFINEON TECHNOLOGIES AG
  • US11784792B2 patent drawing
  • US11784792B2 patent drawing

AI summary

A system may include a first processing component arranged in a secure domain of the system. The system may include a second processing component arranged outside of the secure domain of the system. The system may include one or more hardware accelerators to perform operations in association with providing communication security for the system. The one or more hardware accelerators may be accessible by the first processing component via a channel in the secure domain. The one or more hardware accelerators may be accessible by at least the second processing component via a channel outside of the secure domain.