Hardware Accelerator for Inverted Index Search Processing
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Solution Overview
Problem
Conventional text-based search engines using inverted index structures face inefficiencies in query processing, leading to high energy consumption, latency, and low throughput due to the need for decompression, set operations, and score calculations during search operations.
Innovation Solution
A hardware accelerator is introduced, comprising a block processing circuit to read blocks from an inverted index structure and a search core to extract document numbers and calculate scores, utilizing delta coding and block division for efficient data storage and processing, along with a coupling circuit to enhance parallelism and processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional software-based search processing is used, then the search engine can handle basic queries, but it consumes high energy and has high latency
Solution Approach 1:
The patent replaces software-based search processing with a hardware accelerator that performs decompression, set operations, and score calculations using dedicated circuitry. This substitution of mechanical/computational operations with hardware implementation directly reduces energy consumption and processing time, as hardware operations are more efficient than software execution for these specific tasks.
Solution Approach 2:
The search processing function is divided into separate modular components: a block processing circuit for decompression and a search core for set operations and score calculations. This segmentation allows each component to be optimized independently and operate in parallel, improving overall energy efficiency and reducing processing latency compared to monolithic software processing.
2Quantity of substance
If lists are stored in compressed form to save storage capacity, then storage efficiency improves, but decompression operations increase processing time and energy consumption
Solution Approach 1:
The block processing circuit performs decompression operations as a preliminary step before set operations and score calculations. By preparing the decompressed data in advance in the hardware accelerator, the system enables faster subsequent processing, improving overall throughput despite the initial decompression cost.
Solution Approach 2:
The patent implements decompression using dedicated hardware circuitry in the block processing circuit rather than software-based decompression. This hardware implementation significantly speeds up the decompression process and reduces the energy required, thereby improving query processing throughput while maintaining compressed storage efficiency.
3Measurement precision
If multiple sets operations and score calculations are performed for multi-word queries, then search accuracy improves, but processing complexity and time increase
Solution Approach 1:
The search core processes each word's document list separately through distinct set operations (intersection, union) and score calculations, then combines results. This segmentation of processing steps maintains high search accuracy through proper handling of multi-word queries while organizing complexity into manageable, parallelizable modules that reduce overall processing time.
Solution Approach 2:
The system performs score calculations for all documents matching individual words before applying set operations to combine results. This partial action approach ensures comprehensive search accuracy by evaluating all relevant documents, while the hardware parallelism prevents excessive processing time from affecting overall throughput.
4Productivity
If search operations are performed using conventional software methods, then the system has low hardware complexity, but throughput is low and latency is high
Solution Approach 1:
The patent replaces software-based search processing with a dedicated hardware accelerator containing block processing circuits and search cores. This substitution dramatically increases throughput by performing decompression, set operations, and score calculations in parallel using hardware logic, accepting the trade-off of increased hardware complexity for significant performance gains.
Solution Approach 2:
The hardware accelerator is divided into specialized modules: block processing circuits for decompression and search cores for set operations and scoring. This segmentation enables parallel processing of multiple query components simultaneously, achieving high throughput while keeping each individual hardware module relatively simple and manageable.
Data Source
AI summary
A hardware accelerator includes a block processing circuit configured to read a block from a list stored in an inverted index structure; and a search core configured to extract a document number out of a read block read by the block processing circuit and to calculate a score corresponding to the document number.