Hardware Address Sanitizer With Shadow Memory for Embedded Systems

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Solution Overview

Problem

Software programming bugs in embedded systems, such as out-of-bounds memory access, cause software run stability issues and security vulnerabilities, and existing solutions like address sanitizers and memory tagging extensions incur high CPU loading times and memory overhead.

Innovation Solution

A hardware-based address sanitizer engine with a shadow memory region and accessibility checking mechanism to determine the state of data symbols or zones before access, reducing overhead and improving efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If software-based address sanitizer or memory tagging extension is used, then out-of-bounds memory access detection capability is improved, but CPU loading time and memory overhead increase

Engineering Contradiction:

Improveout-of-bounds memory access detection capabilityVSAvoidCPU loading time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent replaces software-based address sanitizer mechanisms with a hardware-based address sanitizer engine that includes a shadow memory region and accessibility checking circuitry. This hardware substitution eliminates the need for software interpretation and complex runtime checks, thereby reducing CPU loading time while maintaining detection capability.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The shadow memory region is pre-configured with accessibility states for all data symbols and inaccessible zones before program execution. The hardware engine performs preliminary setup of accessibility information in the shadow memory, enabling fast O(1) lookup during runtime without requiring complex software analysis or heap metadata management.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If software-based address sanitizer or memory tagging extension is used, then out-of-bounds memory access detection capability is improved, but memory overhead increases

Engineering Contradiction:

Improveout-of-bounds memory access detection capabilityVSAvoidmemory overhead

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the memory system into two distinct regions: the primary data memory region containing actual data symbols, and a separate shadow memory region containing accessibility state information. This segmentation allows the accessibility metadata to be stored independently with optimized structure, reducing overall memory overhead compared to software-based approaches that require extensive heap metadata.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent changes the representation of accessibility information from complex software data structures to simplified hardware-friendly parameters in the shadow memory. Each entry in the shadow memory uses compact encoding of accessibility states, reducing the memory footprint compared to software-based address sanitizers that require detailed metadata about heap allocations, stack frames, and call stacks.

Inventive Principle:

Principle #35Parameter changes

3Productivity

If hardware-based address sanitizer is implemented, then CPU loading time and memory overhead are reduced, but device complexity increases

Engineering Contradiction:

Improvesystem efficiencyVSAvoidhardware specification

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent creates a simplified copy of the memory address space in the shadow memory region, where each data symbol has a corresponding shadow entry containing only the essential accessibility state. This copying approach allows the hardware engine to perform fast comparisons without requiring complex logic, thereby limiting the increase in device complexity while achieving high productivity.

Inventive Principle:

Principle #26Copying

4Reliability

If inaccessible zones are added around data symbols, then out-of-bounds access detection is improved, but memory space utilization decreases

Engineering Contradiction:

Improveout-of-bounds access detectionVSAvoidmemory space utilization

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent introduces inaccessible zones as intermediary regions between adjacent data symbols in the data memory region. These zones act as buffer regions that are marked as inaccessible in the shadow memory, providing a safety margin for out-of-bounds detection without requiring large padding around each data symbol, thereby balancing detection capability with memory space utilization.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12541463B2Hardware based address sanitizer for embedded systems

Publication Date: 2026.02.03 QUALCOMM INC

AI summary

An apparatus has a data memory region with multiple data symbols and inaccessible zones, a first inaccessible zone placed before each data symbol and a second inaccessible zone placed after each data symbol. The apparatus also has a shadow memory region corresponding to the data memory region. The shadow memory region includes multiple data elements. Each data element corresponds to one of the data symbols or inaccessible zones and indicates an accessibility state of the corresponding data symbol or inaccessible zone. The apparatus includes an address sanitizer hardware block within a processing core and coupled to the shadow memory region. The address sanitizer hardware block checks a selected data element of the shadow memory region, corresponding to a selected data symbol or inaccessible zone being accessed, to determine the accessibility state of the selected data symbol or inaccessible zone, prior to accessing the selected data symbol or inaccessible zone.