Hardware-Accelerated Atomic Data Structures Without Software Locks

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Solution Overview

Problem

Existing systems face performance and reliability issues when accessing software-managed data structures due to the need for locking mechanisms, which introduce latency, deadlock possibilities, and resource overhead, especially in multi-threading environments.

Innovation Solution

Implementing complex compound atomic hardware units (CCAUs) that serialize and rate-limit access to software-managed data structures, eliminating the need for work items to perform atomic operations or obtain locks by using a hardware scheduler to manage access through a one-to-one mapping with data structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional locking mechanisms are used to access software-managed data structures in multi-threading environments, then data consistency is ensured, but system performance deteriorates due to latency, deadlock possibilities, and resource overhead

Engineering Contradiction:
Improvedata consistencyVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent replaces software-based locking mechanisms with hardware-based atomic operations. The complex compound atomic hardware unit (CCAU) provides atomic read-modify-write operations that ensure data consistency through hardware enforcement rather than software locking, thereby eliminating deadlock possibilities and reducing resource overhead while maintaining reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The CCAU acts as an intermediary between processing units and software-managed data structures. It provides a hardware layer that serializes access to shared data structures through atomic operations, mediating between multiple threads and the data structure without requiring traditional software locks, thus improving performance while ensuring consistency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If work items perform atomic operations or obtain locks to access data structures, then data integrity is maintained, but resource overhead increases

Engineering Contradiction:
Improvedata integrityVSAvoidresource overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent substitutes complex software-based atomic operations and locking mechanisms with simplified hardware-based atomic operations. The CCAU performs read-modify-write operations atomically in hardware, eliminating the need for work items to execute complex lock acquisition and release sequences, thereby reducing resource overhead while maintaining data integrity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If software-managed data structures are accessed without hardware acceleration, then flexibility is maintained, but access latency increases

Engineering Contradiction:
ImproveflexibilityVSAvoidaccess latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The CCAU serves as a hardware intermediary that accelerates access to software-managed data structures. It provides fast atomic operations for common data structure operations (linked lists, hash tables, stacks, queues) while maintaining compatibility with software management, thus reducing access latency without sacrificing the flexibility of software-managed structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250217203A1Hardware-accelerated atomic data structures
Publication Date: 2025.07.03 ADVANCED MICRO DEVICES INC
  • US20250217203A1 patent drawing
  • US20250217203A1 patent drawing
  • US20250217203A1 patent drawing

AI summary

A processor includes an accelerated access circuit, a data structure, and a hardware scheduler. The data structure is managed by software and bound to the accelerated access circuit. The hardware scheduler is configured to schedule, on the accelerated access circuit, a work item requesting access to the data structure. The accelerated access circuit is configured to receive a request from the work item to access the data structure. Responsive to the request, the accelerated access circuit is further configured to serialize access by the work item to the data structure thereby preventing other work items from accessing the data structure.