Hardware Bounds Checking via Pointer Bit Reuse
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Solution Overview
Problem
Existing memory safety techniques for applications written in languages like C/C++ face challenges in providing complete coverage for memory errors such as out-of-bounds access and use-after-free errors, with white-listing approaches incurring significant performance overhead and requiring invasive changes to source code or binary layout, while black-listing approaches lack complete coverage and are difficult to adopt.
Innovation Solution
A hardware-based bounds-checking framework that re-purposes unused bits in object pointers to store an index to a bounds table, allowing for efficient enforcement of object bounds and detection of temporal errors without altering the binary layout or incurring substantial performance overhead, by allocating entries in a BITable for heap objects and propagating the index during pointer arithmetic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If white-listing approaches are used to provide complete coverage for memory errors, then memory safety coverage is improved, but performance overhead increases significantly and invasive changes to source code or binary layout are required
Solution Approach 1:
The patent replaces software-based white-listing mechanisms with a hardware-based bounds checking framework. The hardware automatically performs bounds verification using dedicated circuitry that checks pointer validity against stored object boundaries, eliminating the need for software intervention and reducing performance overhead while maintaining complete memory safety coverage
Solution Approach 2:
The patent introduces a hardware bounds checking unit as an intermediary between the processor and memory system. This unit intercepts memory access operations, verifies pointer bounds using stored metadata, and allows or blocks access accordingly, providing complete coverage without requiring changes to application source code
2Reliability
If a bounds checking framework is implemented, then memory safety enforcement is improved, but device complexity increases due to additional hardware components and table management
Solution Approach 1:
The patent designs the bounds checking hardware to serve multiple functions: it validates pointers, enforces memory bounds, detects use-after-free errors, and provides debugging information. This multi-functionality reduces the need for separate hardware components and minimizes overall system complexity while maintaining strong memory safety enforcement
Solution Approach 2:
The patent implements a bounds information table that is dynamically allocated and deallocated based on object lifetime. When objects are freed, their associated bounds information is recovered and made available for reuse, optimizing memory utilization and reducing the long-term memory footprint of the bounds checking framework
3Productivity
If unused bits of object addresses are re-purposed to store index to bounds table, then performance overhead is reduced, but compatibility with existing libraries may be affected
Solution Approach 1:
The patent applies re-purposing of unused address bits selectively only to bounds-checked heap allocations, while leaving other memory accesses unchanged. This localized application maintains compatibility with existing libraries and code paths that do not utilize the bounds checking framework, while providing performance benefits to instrumented code
Data Source
AI summary
Techniques facilitating hardware-based memory-error mitigation for heap-objects. In one example, a system can comprise a process that executes computer executable components stored in a non-transitory computer readable medium. The computer executable components comprise: an entry component; and a re-purpose component. The entry component can allocate an entry in a table to store bounds-information when an object is allocated in memory. The re-purpose component can re-purpose unused bits of an object address to store an index to the table entry.