Hardware Comparator Circuit for Fault Injection Attack Countermeasures

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Solution Overview

Problem

Existing technologies are insufficient in providing strong resilience against well-synchronized fault injection attacks, which can bypass authentication mechanisms and expose resources to unauthorized access.

Innovation Solution

A method and integrated circuit design that utilize a hardware comparator circuit to perform multiple comparisons of access parameters in a hardware comparator circuit, triggering a hardware interrupt upon successful matches, and further ensuring authorized access through interrupt service routines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If software coding practices are used to protect access to resources, then ease of implementation is improved, but security resilience against fault injection attacks deteriorates

Engineering Contradiction:
Improveease of implementationVSAvoidsecurity resilience
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces software-based authentication mechanisms with a hardware comparator circuit that performs authentication comparisons in hardware. The comparator circuit includes first and second operand registers for storing authentication values, and a comparison unit that hardware-compares these values to determine authentication results, thereby providing stronger security resilience against fault injection attacks while maintaining implementation feasibility through integrated circuit design.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If hardware comparator circuit is used to perform multiple comparisons, then security resilience is improved, but device complexity increases

Engineering Contradiction:
Improvesecurity resilienceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the authentication process into multiple independent comparison operations performed by a single hardware comparator circuit. The circuit sequentially compares multiple first authentication values against a second authentication value through multiple comparison operations, allowing thorough security verification while reusing the same hardware components rather than requiring separate hardware for each comparison.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The hardware comparator circuit is designed as a universal authentication mechanism that can perform multiple comparison operations using the same operand registers and comparison unit. The circuit handles various authentication scenarios including comparing multiple first values against a second value, and can operate in different authentication modes, thereby providing strong security resilience without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If separation of condition check and resource enablement is implemented, then security against fault injection is improved, but processing time increases

Engineering Contradiction:
Improvesecurity against fault injectionVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by having the hardware comparator circuit perform authentication comparisons and generate authentication results before any resource access is permitted. The comparator circuit pre-loads authentication values into operand registers and performs comparisons in advance, ensuring that only authenticated operations can proceed to resource enablement, thereby separating condition checking from resource access while minimizing time loss through efficient hardware acceleration.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250028831A1Countermeasure against fault injection attacks
Publication Date: 2025.01.23 TEXAS INSTRUMENTS INC
  • US20250028831A1 patent drawing
  • US20250028831A1 patent drawing
  • US20250028831A1 patent drawing

AI summary

A method includes programming first and second values and a first compare enable command into respective first operand, second operand, and first compare enable command registers in a hardware comparator circuit. The method includes determining that a first match exists corresponding to the first and second values, programming a third value into the first operand register and a fourth value into the second operand register, and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit. In response to a determination that a second match exists corresponding to the third and fourth values, the method includes asserting a success interrupt signal, programming a fifth value into the first operand register and a sixth value into the second operand register and programming a second compare enable command into a second compare enable command register in the hardware comparator circuit.