Hardware Configuration Circuit With Signature-Based Data Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current processing systems face challenges in ensuring the correct operation and integrity of configuration data during the configuration phase, particularly due to potential errors or malfunctions that can lead to incorrect data being stored in non-volatile memory, affecting the system's availability, quality, safety, and security.
Innovation Solution
The implementation of a processing system with configuration data client circuits, a non-volatile memory, and a hardware configuration circuit that reads and transmits configuration data, along with a signature verification mechanism to ensure data integrity and detect any alterations or errors, using data packets and error detection/correction codes to verify the accuracy of configuration data stored in the client circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If configuration data is stored in non-volatile memory without verification, then the configuration process is simple and fast, but the reliability and integrity of the configuration data cannot be ensured
Solution Approach 1:
The patent applies preliminary action by calculating and storing signature data (checksum) of the configuration data in the non-volatile memory before the configuration process. During configuration, this pre-stored signature is used to verify the integrity of received configuration data, ensuring reliability without adding complex verification hardware.
Solution Approach 2:
The patent implements feedback through a verification mechanism where the configuration circuit calculates the signature of received configuration data and compares it with the pre-stored signature in memory. This feedback loop detects transmission errors or malicious alterations, ensuring configuration data integrity while maintaining a relatively simple circuit design.
2Reliability
If configuration data is transmitted without error detection, then the transmission process is fast and simple, but errors or malicious alterations cannot be detected
Solution Approach 1:
The signature data is pre-calculated and stored in the non-volatile memory along with the configuration data. This preliminary preparation enables rapid verification during configuration without requiring time-consuming complex checks, balancing security and speed.
Solution Approach 2:
The patent changes the verification parameter from complex multi-bit comparison to a simplified signature comparison mechanism. This allows fast verification of configuration data integrity by comparing compact signature values rather than entire configuration data sets, reducing verification time while maintaining security.
3Measurement precision
If no verification mechanism is implemented, then the device complexity is low, but the system cannot detect incorrect or altered configuration data
Solution Approach 1:
The patent creates a simplified copy of the configuration data's unique identifier (the signature/checksum) and stores it in the non-volatile memory. During verification, only this compact signature copy needs to be compared against the received configuration data's signature, achieving high verification accuracy with minimal circuit complexity.
Solution Approach 2:
The verification mechanism transforms the complex task of verifying entire configuration data sets into a simpler parameter comparison task by using signature data. This parameter transformation enables accurate verification while keeping the hardware configuration circuit relatively simple.
Data Source
Figure 1~2
Figure 3~4
Figure 5a~5b
AI summary
A processing system (10a) is described. The processing system comprises a plurality of configuration data client circuits (112), a hardware circuit (110) configured to change operation as a function of configuration data (CD) stored by the configuration data client circuits (112), a non-volatile memory (104) comprising the configuration data (CD) for the hardware circuit (110), and a hardware configuration circuit (108a) configured to read the configuration data (CD) from the non-volatile memory (104) and transmit the configuration data (CD) to the configuration data client circuits (112) . The configuration data (CD) are stored in the non-volatile memory (104) in the form of data packets (DCF1..DCFn) comprising an address (ADR) and respective configuration data (CD). Specifically, the hardware configuration circuit (108a) is configured to sequentially read (1080) the data packets (DCF1..DCFn) from the non-volatile memory (104), select a target configuration data client circuit (112), and transmit (1082) via a first data signal (DATA) the configuration data (CD) included in the data packet (DCFi) to a respective target configuration data client circuit (112). Moreover, the hardware configuration circuit (108a) is configured to receiving via a second data signal (DATA', ADR') the configuration data (CD) stored by the target configuration data client circuit (112) and the respective address associated with the target configuration data client circuit (112). Thus, the hardware configuration circuit (108a) may comparing (1090) the configuration data and address received from the target configuration data client circuit (112) with the content of the data packets (DCF1..DCFn) read from the non-volatile memory (104), and possibly generate an error signal.